English
Language : 

HD6417727BP160CV Datasheet, PDF (12/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series
Page
Previous Version
Revised Version
543 18.1 Overview
As an additional serial communications
interface function (SCI), an IC card (smart
card) interface that is compatible to the
ISO/IEC standard 7816-3 for identification
of cards is supported. ...
As an additional serial communications
interface function, a smart card (integrated
circuit card) interface (SCI) that is
compatible with the T = 0 data transfer
protocol of ISO/IEC standard 7816-3
(identification card) is supported. ...
⎯ Section 19 Serial Communication Interface
with FIFO (SCIF)
TxD/TXD, RxD/RXD, CTS, RTS
TxD2, RxD2, CTS2, RTS2
601 19.5 Usage Notes
4. Sending a Break Signal: The I/O
condition and level of the TxD pin are
determined SCP4DT bit in the port SC data
register 2 (SCPDR2) and bits SCP4MD0
and SCP4MD1 port SC control register 2
(SCPCR2). This feature can be used to
send a break signal. To send a break signal
during serial transmission, clear the CP4DT
bit to 0 (designating level), then set the
SCP4MD0 and SCP4MD1 bits to 0 and 1,
respectively, and finally clear the TE bit to 0
(halting transmission). When the TE bit is
cleared to 0, the transmitter is initialized
regardless of the current transmission
state, and 0 is output from the TxD pin.
4. Sending a Break Signal: The I/O
condition and level of the TxD pin are
determined SCP4DT bit in the port SC data
register 2 (SCPDR2) and bits SCP4MD0
and SCP4MD1 port SC control register 2
(SCPCR2). This feature can be used to
send a break signal. To send a break signal
during serial transmission, clear the CP4DT
bit to 0 (designating level), then set the
SCP4MD0 and SCP4MD1 bits to 1 and 0,
respectively, and finally clear the TE bit to 0
(halting transmission). When the TE bit is
cleared to 0, the transmitter is initialized
regardless of the current transmission
state, and 0 is output from the TxD pin.
⎯ Section 20 Serial IO (SIOF)
SIOFSYN, SIORXD
SIOFSYNC, RxD_SIO
634 20.3.4 Register Assignment for Transfer
Data
Note: In figure 20.5, only data portions that
Note: In figure 20.5, only data portions that are shown by the oblique lines are
are shown by the oblique lines are
transmitted or received as effective data.
transmitted or received as effective data. Thus, the areas without the oblique lines
Thus, it is necessary to transmit in byte for are not the object to transmit or receive.
8 bit data and in word 16 bit data. The
areas without the oblique lines are not the
object to transmit or receive.
635 Table 20.6 Transmit Data Sound Mode
Mode
Monaural
Stereo
Same sound for right and left
TDLE
1
1
1
Bit
TDRE
0
1
1
TDREP
*
0
1
Mode
Monaural
Stereo
Same sound for right and left
TDLE
1
1
1
Bit
TDRE
0
1
1
TLREP
*
0
1
Rev.6.00 Mar. 27, 2009 Page x of lvi
REJ09B0254-0600