HD6417727BP160CV Datasheet, PDF(583/1098 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

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HD6417727BP160CV Datasheet, PDF (583/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

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Section 17 Serial Communication Interface (SCI)

1

Serial

data

Start

bit

0 D0

Multi-

processor

bit Stop Start

Data

bit bit

D1

D7 0/1 1 0 D0

Multi-

processor

bit Stop

Data

bit

1

D1

D7 0/1 1

Idling

(marking)

TDRE

TEND

TXI interrupt Writes data to TXI interrupt

request TDR with the TXI request

generated

interrupt pro- generated

cessing routine and

clears TDRE bit to 0

1 frame

TEI interrupt

request

generated

Figure 17.14 Example of SCI Operation in Transmission

(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)

Rev.6.00 Mar. 27, 2009 Page 525 of 1036

REJ09B0254-0600

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