HD6417727BP160CV Datasheet, PDF (54/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Table 14.9 DMAC Sate after the Fourth Transfer Ends........................................................... 439
Table 14.10 Transfer Conditions and Register Settings for Transfer between External
Memory and SCIF Transmitter .............................................................................. 440
Section 15 Timer (TMU)
Table 15.1 TMU Register Configuration ................................................................................. 445
Table 15.2 TMU Interrupt Sources .......................................................................................... 454
Section 16 Realtime Clock (RTC)
Table 16.1 RTC Pin Configuration .......................................................................................... 459
Table 16.2 RTC Registers ........................................................................................................ 460
Table 16.3 Day-of-Week Codes (RWKCNT) .......................................................................... 463
Table 16.4 Day-of-Week Codes (RWKAR)............................................................................. 467
Table 16.5 Recommended Oscillator Circuit Constants (Recommended Values) ................... 477
Section 17 Serial Communication Interface (SCI)
Table 17.1 SCI Pins.................................................................................................................. 485
Table 17.2 Registers................................................................................................................. 486
Table 17.3 SCSMR Settings..................................................................................................... 501
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (1)................................... 502
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (2)................................... 502
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (3)................................... 503
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (4)................................... 503
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (5)................................... 504
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (6)................................... 504
Table 17.4 Bit Rates and SCBRR Settings in Asynchronous Mode (7)................................... 505
Table 17.5 Bit Rates and SCBRR Settings in Clock Synchronous Mode ................................ 506
Table 17.6 Maximum Bit Rates for Various Frequencies with Baud Rate Generator
(Asynchronous Mode)............................................................................................ 507
Table 17.7 Maximum Bit Rates during External Clock Input (Asynchronous Mode) ............. 508
Table 17.8 Maximum Bit Rates during External Clock Input (Clock Synchronous Mode)..... 508
Table 17.9 Serial Mode Register Settings and SCI Communication Formats.......................... 510
Table 17.10 SCSMR and SCSCR Settings and SCI Clock Source Selection ............................ 510
Table 17.11 Serial Communication Formats (Asynchronous Mode) ......................................... 512
Table 17.12 Receive Error Conditions and SCI Operation ........................................................ 520
Table 17.13 SCI Interrupt Sources ............................................................................................. 538
Table 17.14 SCSSR Status Flags and Transfer of Receive Data................................................ 539
Section 18 Smart Card Interface
Table 18.1 SCI Pins.................................................................................................................. 545
Table 18.2 Registers................................................................................................................. 545
Rev.6.00 Mar. 27, 2009 Page lii of lvi
REJ09B0254-0600