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HD6417727BP160CV Datasheet, PDF (140/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series
Section 2 CPU
Instruction
LDC.L @Rn+,RE
LDS Rn,DSR
LDS Rn,A0
LDS Rn,X0
LDS Rn,X1
LDS Rn,Y0
LDS Rn,Y1
LDC Rn,MOD
LDC Rn,RS
LDC Rn,RE
Instruction Code
0100nnnn01110111
0100nnnn01101010
0100nnnn01111010
0100nnnn10001010
0100nnnn10011010
0100nnnn10101010
0100nnnn10111010
0100nnnn01011110
0100nnnn01101110
0100nnnn01111110
Operation
(Rn) → RE, Rn + 4 → Rn
Rn → DSR
Rn → A0
Rn → X0
Rn → X1
Rn → Y0
Rn → Y1
Rn → MOD
Rn → RS
Rn → RE
Execu-
tion
States
5
1
1
1
1
1
1
3
3
3
T Bit
—
—
—
—
—
—
—
—
—
—
2.6.3 Single and Double Data Transfer for DSP Data Instructions
The new instructions in this class are provided to reduce the program code size for DSP
operations. All the new instructions in this class have a 16-bit code length. Instructions in this
class are divided into two groups: single data transfer instructions and double data transfer
instructions. The operand flexibility of the double data transfer instructions is the same as with the
A field in parallel instruction class data transfer instructions described in section 2.6.4, DSP
Operation Instruction Set. However, conditional load instructions cannot be used with these 16-bit
instructions. In single transfer, the Ax pointer and two other pointers are used as the As pointer,
but the Ay pointer is not used. Tables 2.27 and 2.28 list the single and double data transfer
instructions.
With double data transfer group instructions, X memory and Y memory can be accessed in
parallel. The Ax pointer can only be used by X memory access instructions, and the Ay pointer
only by Y memory access instructions. Double data transfer instructions can only access the on-
chip X and Y memory areas. Single data transfer instructions use a 16-bit instruction code, and can
access any memory address space.
Rn (n = 2 to 7) registers are normally used as the Ax, Ay, and As pointers. The pointer names
themselves can be changed with the assembler rename function. The following renaming scheme
is recommended.
R2:As2, R3:As3, R4:Ax0 (As0), R5:Ax1 (As1), R6:Ay0, R7:Ay1, R8:Ix, R9:Iy
Rev.6.00 Mar. 27, 2009 Page 82 of 1036
REJ09B0254-0600