HD6417727BP160CV Datasheet, PDF (805/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 24 USB HOST Module
24.2.19 HcRhDescriptorA
HcRhDescriptorA Register (H'04000448)
The HcRhDescriptorA register is the first register of two registers describing the features of the
root hub. The reset value is implementation specific. The descriptor length (11), descriptor type
(TBD), the hub controller current bit (0) of Class Descriptor of the hub are emulated by HCD. All
other bits are placed in the HcRhDescriptorA register and HcRhDescriptorB register.
Register: HcRhDescriptorA
Bits
Reset R/W
31–24 02h
R/W
23–13 0h
—
12
1
R/W
11
0
R/W
10
0
R
Offset: 48–4B
Description
PowerOnToPowerGoodTime (POTPGT)
These bits specify the time required for waiting before
accessing the power-on port of the root hub. These bits are
implementation specific. The unit of time is 2 ms. The time is
calculated as POTPGT × 2 ms.
Reserved.
NoOverCurrentProtection (NOCP)
This bit selects how the over-current status of the root hub is
reported. When this bit is cleared, the
OverCureentProtectionMode bit specifies global report or report
at each port.
0: Over-current status is collectively reported for all downstream
ports.
1: Over-current protection is not supported. (initial value)
OverCurrentProtectionMode (OCPM)
This bit selects how the over-current status in the root-hub port
is reported. At reset, this bit reflects the same mode of
PowerSwitchingMode. When the NoOverCureentProtection bit
is cleared, this bit is valid.
0: Over-current status is collectively reported for all downstream
ports. (initial value)
1: Over-current protection is not supported.
DeviceType (DT)
USB Host Controller is not a compound device. Always set to 0.
Rev.6.00 Mar. 27, 2009 Page 747 of 1036
REJ09B0254-0600