HD6417727BP160CV Datasheet, PDF (503/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 15 Timer (TMU)
15.1.3 Register Configuration
Table 15.1 shows the TMU register configuration.
Table 15.1 TMU Register Configuration
Channel Register
Abbre-
viation R/W
Common Timer start register
TSTR R/W
0
Timer constant register 0 TCOR0 R/W
Timer counter 0
TCNT0 R/W
Timer control register 0 TCR0 R/W
1
Timer constant register 1 TCOR1 R/W
Timer counter 1
TCNT1 R/W
Timer control register 1 TCR1 R/W
2
Timer constant register 2 TCOR2 R/W
Timer counter 2
TCNT2 R/W
Timer control register 2 TCR2 R/W
Note: * Initialized by a power-on reset or manual reset.
Initial Value* Address
Access
Size
H'00
H'FFFFFE92 8
H'FFFFFFFF H'FFFFFE94 32
H'FFFFFFFF H'FFFFFE98 32
H'0000
H'FFFFFE9C 16
H'FFFFFFFF H'FFFFFEA0 32
H'FFFFFFFF H'FFFFFEA4 32
H'0000
H'FFFFFEA8 16
H'FFFFFFFF H'FFFFFEAC 32
H'FFFFFFFF H'FFFFFEB0 32
H'0000
H'FFFFFEB4 16
Rev.6.00 Mar. 27, 2009 Page 445 of 1036
REJ09B0254-0600