HD6417727BP160CV Datasheet, PDF (304/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 9 Power-Down Modes and Software Reset
WTCNT value
Interrupt
request
WDT overflow and branch to
interrupt handling routine
Crystal oscillator settling
time and PLL synchronization
time
Clear bit STBCR.STBY before
WTCNT reaches H'80. When
STBCR.STBY is cleared, WTCNT
halts automatically.
H'FF
H'80
Time
Figure 9.1 Canceling Standby Mode with STBCR.STBY
Canceling with a Reset: Standby mode can be canceled with a reset (power-on or manual).
Keep the RESET or RESETM pin low until the clock oscillation settles.
The internal clock will be output continuously to the CKIO pin.
9.4.3 Clock Pause Function
In standby mode, the clock input from the EXTAL pin or CKIO pin can be halted and the
frequency can be changed. This function is used as follows:
1. Enter standby mode using the procedure for changing to standby mode.
2. When the chip enters standby mode and the clock stopped within the chip, the STATUS1 pin
output is low and the STATUS0 pin output is high.
3. When the STATUS1 pin goes low and the STATUS0 pin goes high, the input clock is stopped
or the frequency is changed.
4. When the frequency is changed, an NMI, IRL, IRQ, PINT or on-chip supporting module
(except the internal timer) interrupt is input after changing the frequency. When the clock is
stopped, the same interrupts are input after the clock is applied.
5. After the time set in the WDT has elapsed, the clock starts being applied within the chip, the
STATUS1 and STATUS0 pins both go low, operation resumes from the interrupt exception
handling.
Rev.6.00 Mar. 27, 2009 Page 246 of 1036
REJ09B0254-0600