HD6417727BP160CV Datasheet, PDF (307/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 9 Power-Down Modes and Software Reset
9.5.2 Clearing the Module Standby Function
The module standby function can be cleared by clearing the MSTP17, MSTP15 to MSTP13,
MSTP11 to MSTP4, and MSTP2 to MSTP0 bits to 0, or by a power-on reset or manual reset.
9.6 Timing of STATUS Pin Changes
The timing of STATUS1 and STATUS0 pin changes is shown in figures 9.2 to 9.9.
The meanings of STATUS are as follows:
• Reset: HH (STATUS1 is high, STATUS0 is high)
• Sleep: HL (STATUS1 is high, STATUS0 is low)
• Standby: LH (STATUS1 is low, STATUS0 is high)
• Normal: LL (STATUS1 is low, STATUS0 is low)
The meanings of clock units are as follows:
• Bcyc: Bus clock cycle
• Pcyc: Peripheral clock cycle
• Rcyc: 32.768-kHz RTC clock cycle
9.6.1 Timing for Resets
Power-On Reset
CKIO,
CKIO2*
RESETP
PLL settling
time
STATUS
Normal
Reset
Normal
0 to 5 Bcyc
0 to 30 Bcyc
Note: * CKIO2 can be used at only clock modes 0, 1 and 2.
Figure 9.2 Power-On Reset (Clock Modes 0, 1, 2, and 7) STATUS Output
Rev.6.00 Mar. 27, 2009 Page 249 of 1036
REJ09B0254-0600