HD6417727BP160CV Datasheet, PDF (88/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 2 CPU
31
SSR
31
SPC
31
GBR
31
VBR
31
RS
31
RE
31
16 15
MOD
ME
MS
ME: Modulo end address, MS: Modulo start address
0
Saved status register (SSR)
0
Saved program counter (SPC)
0
Global base register
0
Vector base register
0
Repeat start register
0
Repeat end register
0
Modulo register
Saved status register (SSR)
Stores current SR value at time of exception to indicate processor status when returning to instruction
stream from exception handler.
Saved program counter (SPC)
Stores current PC value at time of exception to indicate return address on completion of exception
handling.
Global base register (GBR)
Stores base address of GBR-indirect addressing mode. The GBR-indirect addressing mode is used for
data transfer and logical operations on the on-chip peripheral module register area.
Vector base register (VBR)
Stores base address of exception vector area.
Repeat start register (RS)
Used in DSP mode only. Indicates start address of repeat loop.
Repeat end register (RE)
Used in DSP mode only. Indicates address of repeat loop end.
Modulo register (MOD)
Used in DSP mode only.
MOD[31:16]: ME: Modulo end address, MOD[15:0]: MS: Modulo start address.
In X/Y operand address generation, the CPU compares the address with ME, and if it is the same,
loads MS in either the X or Y operand address register (depending on bits DMX and DMY in the SR
register).
Figure 2.5 Control Registers (2)
Rev.6.00 Mar. 27, 2009 Page 30 of 1036
REJ09B0254-0600