HD6417727BP160CV Datasheet, PDF (688/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 20 Serial IO (SIOF)
20.3 Operation
20.3.1 Serial Clock
(1) Master/Slave
There are two modes as serial clock listed as below.
• Slave mode: SCK_SIO and SIOFSYNC is input.
• Master mode: SCK_SIO and SIOFSYNC is output.
(2) Baud Rate Generator (BRG)
At the SIOF master mode, serial clock is generated using the baud rate generator (BRG). The baud
rate can be selected from 1/2 to 1/1024.
Figure 20.2 shows the serial clock supply system.
SIOMCLK
Peripheral clock
(Pφ)
SCK_SIO
BRG
E
From 1/2 to 1/1024 MCLK
Timing control
Master
OE
Figure 20.2 Serial Clock Supply System
Table 20.3 shows examples about serial clock frequency.
Table 20.3 Examples of SIOF Clock Frequency
Sampling Rate
Frame Length
8 kHz
44.1 kHz
48 kHz
32 bits
256 kHz
1.4112 MHz
1.536 MHz
64 bits
512 kHz
2.8224 MHz
3.072 MHz
128 bits
1.024 MHz
5.6448 MHz
6.144 MHz
256 bits
2.048 MHz
11.2896 MHz
12.288 MHz
Note: In Master mode, SCK_SIO continues to be output regardless of whether there is any data.
Rev.6.00 Mar. 27, 2009 Page 630 of 1036
REJ09B0254-0600