HD6417727BP160CV Datasheet, PDF (519/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 16 Realtime Clock (RTC)
16.2 Register Descriptions
16.2.1 64-Hz Counter (R64CNT)
The 64-Hz counter (R64CNT) is an 8-bit read-only register that indicates the state of the RTC
divider circuits (RTC prescaler or R64CNT) between 64 Hz and 1 Hz.
R64CNT is reset to H'00 when the RESET bit in RTC control register 2 (RCR2) or the ADJ bit in
RCR2 is set to 1.
R64CNT is not initialized by a power-on reset or manual reset, or in standby mode, and the
operation is continued.
Bit 7 is always read as 0.
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
1Hz
2Hz
4Hz
8Hz 16Hz 32Hz 64Hz
—
—
—
—
—
—
—
R
R
R
R
R
R
R
16.2.2 Second Counter (RSECCNT)
The second counter (RSECCNT) is an 8-bit read/write register that is used for setting/counting in
the BCD-coded second section of the RTC. The count operation is performed by a carry for each
second of the 64-Hz counter.
The settable range is 00 to 59 in decimal. If other values are set, correct operation is not provided.
When modifying RSECCNT, check that the count operation has been halted with the START bit
in RCR2.
RSECCNT is not initialized by a power-on reset or manual reset, or in standby mode, and the
operation is continued.
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
10 seconds
1 second
—
—
—
—
—
—
—
R/W R/W R/W R/W R/W R/W R/W
Rev.6.00 Mar. 27, 2009 Page 461 of 1036
REJ09B0254-0600