HD6417727BP160CV Datasheet, PDF (540/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 17 Serial Communication Interface (SCI)
• On-chip baud rate generator with selectable bit rates
• Internal or external transmit/receive clock source: From either baud rate generator (internal) or
SCK0 pin (external)
• Four types of interrupts: Transmit-data-empty, transmit-end, receive-data-full, and receive-
error interrupts are requested independently.
• When the SCI is not in use, it can be stopped by halting the clock supplied to it, saving power.
17.1.2 Block Diagram
Figure 17.1 shows an SCI block diagram.
Module data bus
Internal
data bus
RxD0
TxD0
SCK0
SCRDR
SCRSR
SCTDR
SCPCR
SCPDR
SCSSR
SCBRR
SCSSR
SCTSR
SCSCR
SCSMR
Transmit/
receive
control
Baud rate
generator
Parity generation
Clock
Parity check
External clock
Legend:
SCRSR: Receive shift register
SCRDR: Receive data register
SCTSR: Transmit shift register
SCTDR: Transmit data register
SCSMR: Serial mode register
SCI
SCSCR: Serial control register
SCSSR: Serial status register
SCBRR: Bit rate register
SCPDR: SC port data register
SCPCR: SC port control register
Figure 17.1 SCI Block Diagram
Pφ
Pφ/4
Pφ/16
Pφ/64
TEI
TXI
RXI
ERI
Rev.6.00 Mar. 27, 2009 Page 482 of 1036
REJ09B0254-0600