HD6417727BP160CV Datasheet, PDF (144/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 2 CPU
basically the same as in the double data transfer instructions described in section 2.6.3, Single and
Double Data Transfer for DSP Data Instructions, but has a special function in load instructions.
B-field data operation instructions are of three kinds: double data operation instructions,
conditional single data operation instructions, and unconditional single data operation instructions.
The formats of the DSP operation instructions are shown in table 2.30. The respective operands
are selected independently from the DSP registers. The correspondence between DSP operation
instruction operands and registers is shown in table 2.31.
Table 2.30 DSP Operation Instruction Formats
Type
Double data operation instructions
Conditional single data operation
instructions
Unconditional single data operation
instructions
Instruction Formats
ALUop. Sx, Sy, Du
MLTop. Se, Df, Dg
ALUop. Sx, Sy, Dz
DCT ALUop. Sx, Sy, Dz
DCF ALUop. Sx, Sy, Dz
ALUop. Sx, Dz
DCT ALUop. Sx, Dz
DCF ALUop. Sx, Dz
ALUop. Sy, Dz
DCT ALUop. Sy, Dz
DCF ALUop. Sy, Dz
ALUop. Sx, Sy, Dz
ALUop. Sx, Dz
ALUop. Sy, Dz
MLTop. Se, Sf, Dg
Rev.6.00 Mar. 27, 2009 Page 86 of 1036
REJ09B0254-0600