HD6417727BP160CV Datasheet, PDF (500/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 14 Direct Memory Access Controller (DMAC)
Measures to avoid the problem:
The problem described above occurs only when all of the above conditions are met. It does
not arise if even one of the conditions is not met. One of the methods listed below should
therefore be employed when using the DMAC to transfer data from XY memory:
(1) Use the direct address mode
(2) Use long word size or word size data
(3) Use big-endian data transfer
14. Do not use the DMAC when in sleep mode. Alternately, set the clock ratio to Iφ:Bφ = 1:1
when using sleep mode. Normal operation cannot be guaranteed otherwise.
15. Do not use the DMAC when only the IFC[2:0] bits in the frequency control register (FRQCR)
are modified and the clock ratio is set to other than Iφ:Bφ = 1:1. Normal operation cannot be
guaranteed otherwise. However, there is no problem if the STC[2:0] bits are modified
simultaneously with the IFC[2:0] bits in the frequency control register (FRQCR).
Rev.6.00 Mar. 27, 2009 Page 442 of 1036
REJ09B0254-0600