HD6417727BP160CV Datasheet, PDF (699/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 20 Serial IO (SIOF)
20.3.7 Procedures for Transmit or Receive
(1) Transmitting in Master
Figure 20.9 shows an example of setting and operation of transmitting in master.
No.
Time chart
Start
Settting of SIMDR register,
1 _{SISCR register, SITDAR register,}
SIRDAR register, SICDAR register,
SIFCTR register
2 "1" is set to SCKE bit of SICTR register
Setting content of SIOF
Setting of operation mode,
serial clock, slot position of
transmit or receive data,
slot position of control data
and limit of FIFO request
Set the beggin to operation
of baud rate generator
SIOF operation
3 SCK_SIO begin to transmit
4 _{"1" is set to FSE bit of SICTR register}
5 "1" is set to TXE bit of SICTR register
Transmit serial clock
Set the begin to transmit of Transmit frame
frame synchronized signal synchronized signal
Set the transmit enable
Submit the transmit
request
N
6
TDREQ = 1?
Y
7 Setting of SITDR register
Set the transmit data
Synchronized to SIOFSYNC,
8 _{content of SITDR is setn from TXD_SIO}
Transmit
Finish to transmit? ^N
9
Y
"0" is set to TXE bit of SICTR register
Set to transmit disable
Finish to transmit
End
Figure 20.9 Example of Transmit Operation in Master
Rev.6.00 Mar. 27, 2009 Page 641 of 1036
REJ09B0254-0600