HD6417727BP160CV Datasheet, PDF (11/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

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341 Figure 12.17 Basic Timing for Synchronous
DRAM Single Write
RAS3
RAS
343 Figure 12.19 Synchronous DRAM Auto-
Refresh Timing
RAS3
RAS
344 Figure 12.20 Synchronous DRAM Self-
Refresh Timing
RAS3
RAS
346 Figure 12.21 Synchronous DRAM Mode
Write Timing
RAS3
RAS
379 14.1 Overview
This chip includes a four-channel direct
memory access controller (DMAC). The
DMAC can be used in place of the CPU to
perform high-speed transfers between
external devices that have DACK (transfer
request acknowledge signal), external
memory, memory-mapped external
devices, and on-chip supporting modules
(SIOF, SCIF, USB function, and A/D
converter). Using the DMAC reduces the
burden on the CPU and increases overall
operating efficiency
This chip includes a four-channel direct
memory access controller (DMAC). The
DMAC can be used in place of the CPU to
perform high-speed transfers between
external devices that have DACK (transfer
request acknowledge signal), external
memory, memory-mapped external
devices, and on-chip supporting modules
(SIOF, SCIF, USBF, A/D converter, and
D/A converter). Using the DMAC reduces
the burden on the CPU and increases
overall operating efficiency
441 14.6 Usage Notes
5. The on-chip supporting modules that the
DMAC can access are, SIOF, SCIF, USB
function, A/D converter, and I/O ports. Do
not access the other on-chip supporting
modules by the DMAC.
5. The on-chip supporting modules that the
DMAC can access are, SIOF, SCIF, USBF,
A/D converter, D/A converter, and I/O ports.
Do not access the other on-chip supporting
modules by the DMAC.
459 16.1.3 Pin Configuration
Table 16.1 RTC Pin Configuration
Notes: 1. When the RTC is not used, set
EXTAL2 to pull-up (to Vcc) and make no
connection for XTAL2.
Notes: 1. When the RTC is not used, set
EXTAL2 to pull-up (to Vcc-RTC) and make
no connection for XTAL2.
⎯ Section 17 Serial Communication Interface
(SCI)
TxD, RxD, SCK
TxD0, RxD0, SCK0
⎯ Section 18 Smart Card Interface
TxD, RxD, SCK
TxD0, RxD0, SCK0
Rev.6.00 Mar. 27, 2009 Page ix of lvi
REJ09B0254-0600