HD6417727BP160CV Datasheet, PDF (916/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 28 A/D Converter
28.1.2 Block Diagram
Figure 28.1 shows a block diagram of the A/D converter.
Peripheral data bus
Internal
data bus
AV_CC
AV_SS
10-bit
D/A
AN₂
AN₃
AN₄
AN₅
AN₆
AN₇
+
Analog
multi-
plexer
–
Comparator
Sample-and-
hold circuit
Control circuit
ADTRG
A/D converter
Legend:
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
Figure 28.1 A/D Converter Block Diagram
Rev.6.00 Mar. 27, 2009 Page 858 of 1036
REJ09B0254-0600
φ/8
φ/16
ADI
interrupt
signal