HD6417727BP160CV Datasheet, PDF (1048/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 32 Electrical Characteristics
32.3.15 Delay Time Variation Due to Load Capacitance
A graph (reference data) of the variation in delay time when a load capacitance greater than that
stipulated (30 pF or 50 pF) is connected to this LSI’s pins is shown below. The graph shown in
figure 32.61 should be taken into consideration in the design process if the stipulated capacitance
is exceeded in connecting an external device.
If the connected load capacitance exceeds the range shown in figure 32.61, the graph will not be a
straight line.
+3
+2
+1
+0
+0
+10
+20
+30
+40
+50
Load Capacitance [pF]
Figure 32.61 Load Capacitance vs. Delay Time
Rev.6.00 Mar. 27, 2009 Page 990 of 1036
REJ09B0254-0600