HD6417727BP160CV Datasheet, PDF (17/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

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32.3.12 USB Module Signal Timing
Table 32.15 USB Module Signal Timing
Item
UCLK external input clock
frequency (48 MHz)
Clock rise time
Clock fall time
Symbol
tFREQ
tR48
tF48
Min
47.9
—
—
Max
48.1
6
6
Unit
MHz
ns
ns
Figure
32.58
Item
UCLK external input clock
frequency (48 MHz) (when using
USB function controller)
UCLK external input clock
frequency (48 MHz) (when using
USB host controller)
Clock rise time
Clock fall time
Symbol
tFREQ
tR48
tF48
Min
Max
Unit
47.9
48.1
MHz
47.976 48.024
—
6
ns
—
6
ns
Figure
32.58
989 32.3.14 AC Characteristics Measurement
Conditions
Figure 32.60 Output Load Circuit
Notes: 1. CL is the total value that includes
the capacitance of measurement
instruments, etc., and is set as follows for
each pin.
30pF: CKIO, RASxx, CASxx, CS0, CS2 to
CS6, CE2A, CE2B, BACK
Note amended
Notes: 1. CL is the total value that includes
the capacitance of measurement
instruments, etc., and is set as follows for
each pin.
30pF: CKIO, RAS, CAS, CS0, CS2 to CS6,
CE2A, CE2B, BACK
994, A.1 Pin Functions
996 _{Table A.1 Pin Functions}
Type
Signal Name
(Initial Status: Bold)
Bus
functions
USB related
RAS3 /PTJ[0],
Reserved/PTJ[1],
Reserved/PTJ[3]*³,
Reserved/PTJ[4]*³,
Reserved/PTJ[5]*³
USB1_ovr_crnt /
USBF_VBUS
USB2_ovr_crnt
Pin No.
(HQFP)
129, 130,
133, 135,
136
123
124
I/O
O/IO
Power-
On
Reset
H
Manual
Reset
O/P
Standby
Z(H)/K
Release/
Open Bus
Privileges
Z(H)/P
I/I
I
Z/Z
Z/Z
I/I
I
I
Z
Z
I
Type
Signal Name
(Initial Status: Bold)
Bus
functions
USB related
RAS / PTJ[0],
Reserved/PTJ[1],
Reserved/PTJ[3]*³,
Reserved/PTJ[4]*³,
Reserved/PTJ[5]*³
USB1_ovr_current/
USBF_VBUS
USB2_ovr_current
Pin No.
(HQFP)
129, 130,
133, 135,
136
123
124
I/O
O/IO
Power-
On
Reset
Manual
Reset
H
O/P
Standby
Z(H)/K
Release/
Open Bus
Privileges
Z(H)/P
I/I
I
Z/Z
Z/Z
I/I
I
I
Z
Z
I
999,
1000,
1002
A.2 Treatment of Unused Pins
Table A.2 Treatment of Unused Pins
Type
Signal Name
(Initial Status: Bold)
Pin No (HQFP) Pin No (CSP)
Clock and
oscillation
related
XTAL2
EXTAL2
2
B4
3
A2
Bus
functions
RAS3/PTJ[0],
Reserved/PTJ[1],
Reserved/PTJ[3],
Reserved/PTJ[4],
Reserved/PTJ[5]
129, 130, 133,
135, 136
USB related USB1_ovr_crnt /USBF_VBUS 123
USB2_ovr_crnt
124
W15, T16, W14,
U14, T14
W18
V17
USB1_P(analog),
USB1_M(analog),
USB2_P(analog),
USB2_M(analog)
226, 227, 229, 230 F3, F2, E4, E3
I/O
Treatment
when Not Used
O Open
I Connect to Vcc
O/IO Open
I/I Pull up
I Pull up
IO Open*²
Type
Signal Name
(Initial Status: Bold)
Clock and
oscillation
related
XTAL2
EXTAL2
Bus
functions
RAS /PTJ[0],
Reserved/PTJ[1],
Reserved/PTJ[3],
Reserved/PTJ[4],
Reserved/PTJ[5]
USB related USB1_ovr_current/
USBF_VBUS
USB2_ovr_current
USB1_P(analog),
USB1_M(analog),
USB2_P(analog),
USB2_M(analog)
Pin No (HQFP) Pin No (CSP)
2
B4
3
A2
129, 130, 133,
135, 136
W15, T16, W14,
U14, T14
123
W18
124
V17
226, 227, 229, 230 F3, F2, E4, E3
I/O
Treatment
when Not Used
O Open
I Pull up (Vcc-
RTC)
O/IO Open
I/I Pull up
I Pull up
IO Open*² or pull
down
1004, A.3 Pin Status when Accessing Address
1005 Spaces
Table A.3 Pin Status (Normal Memory/Little
Endian)
RAS3
RAS
1006, Table A.4 Pin Status (Normal Memory/Big
1007 Endian)
RAS3
RAS
Rev.6.00 Mar. 27, 2009 Page xv of lvi
REJ09B0254-0600