HD6417727BP160CV Datasheet, PDF (355/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 12 Bus State Controller (BSC)
12.2.2 Bus Control Register 2 (BCR2)
The bus control register 2 (BCR2) is a 16-bit read/write register that selects the bus-size width of
each area. It is initialized to H'3FF0 by a power-on reset, but is not initialized by a manual reset or
by standby mode. Do not access external memory outside area 0 until BCR2 register initialization
is complete.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — A6 A6 A5 A5 A4 A4 A3 A3 A2 A2 — — — —
SZ1 SZ0 SZ1 SZ0 SZ1 SZ0 SZ1 SZ0 SZ1 SZ0
Initial value: 0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
R/W: R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R
Bits 15, 14, 3, 2, 1, and 0—Reserved: These bits are always read as 0. The write value should
always be 0.
Bits 2n + 1, 2n—Area n (2 to 6) Bus Size Specification (AnSZ1, AnSZ0): Specify the bus sizes
of physical space area n (n = 2 to 6).
Bit 2n + 1: AnSZ1
0
1
0
1
Bit 2n: AnSZ0
0
1
0
1
0
1
0
1
Port A / B
Unused
Used
Description
Reserved (Setting disabled)
Byte (8-bit) size
Word (16-bit) size
Longword (32-bit) size
Reserved (Setting disabled)
Byte (8-bit) size
Word (16-bit) size
Reserved (Setting disabled)
Rev.6.00 Mar. 27, 2009 Page 297 of 1036
REJ09B0254-0600