HD6417727BP160CV Datasheet, PDF (766/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 23 USB Function Controller
(2) Data Stage (Control-In)
USB function
IN token reception
Application
From setup stage
1 written
to USBTRG/EP0s
RDFN?
Yes
No
NACK
Valid data
in EP0i FIFO?
Yes
No
NACK
Data transmission to host
ACK
Write data to USBEP0i data
register (USBEPDR0i)
Write 1 to EP0i packet
enable bit
(USBTRG/EP0i PKTE = 1)
Set EP0i transfer-end
flag to 1
(USBIFR0/EP0i TS = 1)
Interrupt request
Clear EP0i transfer-end flag
(USBIFR0/EP0i TS = 0)
Write data to USBEP0i
data register (USBEPDR0i)
Write 1 to EP0i packet
enable bit
(USBTRG/EP0i PKTE = 1)
Figure 23.6 Data Stage Operation (Control-In)
Rev.6.00 Mar. 27, 2009 Page 708 of 1036
REJ09B0254-0600