HD6417727BP160CV Datasheet, PDF (612/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 18 Smart Card Interface
Table 18.7 Maximum Bit Rates for Frequencies (Smart Card Interface Mode)
Pφ (MHz)
7.1424
10.00
10.7136
13.00
14.2848
16.00
18.00
Maximum Bit Rate (Bit/s)
9600
13441
14400
17473
19200
21505
24194
N
n
0
0
0
0
0
0
0
0
0
0
0
0
0
0
The bit rate error is found as follows:
Error
(%)
=
(
1488
×
Pφ
2^2n−1 ×
B
×
(N
+
1)
×
10⁶
−
1)
×
100
Table 18.8 shows the relationship between transmit/receive clock register set values and output
states on the smart card interface.
Table 18.8 Register Set Values and SCK0 Pin
Register Value
SCK0 Pin
Setting SMIF C/A
1^*1
1
0
CKE1 CKE0
0
0
Output
Port
State
Determined by setting of port
register SCP1MD1 and
SCP1MD0 bits
1
0
0
1
2^*2
1
1
0
0
Low output
SCK0 (serial clock) output state
Low output state
1
1
0
1
3^*2
1
1
1
0
SCK0 (serial clock) output state
High output High output state
1
1
1
1
SCK0 (serial clock) output state
Notes: 1. The SCK0 output state changes as soon as the CKE0 bit is modified. The CKE1 bit
should be cleared to 0.
2. The clock duty remains constant despite stopping and starting of the clock by
modification of the CKE0 bit.
Rev.6.00 Mar. 27, 2009 Page 554 of 1036
REJ09B0254-0600