HD6417727BP160CV Datasheet, PDF (502/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 15 Timer (TMU)
15.1.2 Block Diagram
Figure 15.1 shows a block diagram of the TMU.
Pφ
Prescaler
Bus interface
RTCCLK
TUNI0
TUNI1
Clock
controller
Ch. 0
Counter
controller
Interrupt
controller
Ch. 1
Counter
controller
Interrupt
controller
Ch. 2
Counter
controller
TSTR
TCR0
TCNT0
TCOR0
TCR1
TCNT1
TCOR1
TCR2
TCNT2
TCOR2
TUNI2
Interrupt
controller
Legend:
TSTR: Timer start register
TCR: Timer control register
TMU
TCNT: 32-bit timer counter
TCOR: 32-bit timer constant register
Figure 15.1 TMU Block Diagram
Rev.6.00 Mar. 27, 2009 Page 444 of 1036
REJ09B0254-0600