HD6417727BP160CV Datasheet, PDF (572/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 17 Serial Communication Interface (SCI)
Initialize
Clear TE and RE bits in SCSCR to 0
Set CKE1 and CKE0 bits in SCSCR
(TE and RE bits are 0)
(1)
Select transmit/receive
(2)
format in SCSMR
Set value to SCBRR
(3)
Wait
Has a 1-bit
No
interval elapsed?
Yes
Set TE or RE in SCSCR to 1.
Also set RIE, TIE, TEIE, and MPIE ⁽⁴⁾
as necessary.
End
(1) Select the clock source in the serial
control register (SCSCR). Leave
RIE, TIE, TEIE, MPIE, TE, and RE
cleared to 0. If clock output is
selected in asynchronous mode,
clock output starts immediately
after the setting is made to SCSCR.
(2) Select the communication format in
the serial mode register (SCSMR).
(3) Write the value corresponding to
the bit rate in the bit rate register
(SCBRR) unless an external clock
is used.
(4) Wait at least one bit interval, then
set TE or RE in the serial control
register (SCSCR) to 1. Also set
RIE, TIE, TEIE, and MPIE as
necessary. Setting TE and RE
enables the TxD0 and RxD0 pins to
be used. The initial states are the
mark transmit state, and the idle
receive state (waiting for a start bit).
Figure 17.7 Sample SCI Initialization Flowchart
Rev.6.00 Mar. 27, 2009 Page 514 of 1036
REJ09B0254-0600