HD6417727BP160CV Datasheet, PDF (125/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Type
System
control
instructions
Total:
Kinds of
Instruction Op Code
15
CLRT
CLRMAC
CLRS
LDC
LDS
LDTLB
NOP
PREF
RTE
SETS
SETT
SLEEP
STC
STS
TRAPA
68
Function
T bit clear
MAC register clear
S bit clear
Load into control register
Load into system register
PTEH/PTEL load into TLB
No operation
Data prefetch to cache
Return from exception handling
S bit setting
T bit setting
Transition to power-down mode
Store from control register
Store from system register
Trap exception handling
Section 2 CPU
Number of
Instructions
75
189
Rev.6.00 Mar. 27, 2009 Page 67 of 1036
REJ09B0254-0600