TCI6636K2H Datasheet, PDF (92/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-1
Device Memory Map Summary for TCI6636K2H (Part 12 of 12)
Physical 40 bit Address
Start
End
Bytes
ARM View
DSP View
SOC View
00 2180 0000 00 2180 7FFF 32K
PCIe config
PCIe config
PCIe config
00 2180 8000 00 21BF FFFF 4M-32K Reserved
Reserved
Reserved
00 21C0 0000 00 21FF FFFF 4M
Reserved
Reserved
Reserved
00 2200 0000 00 229F FFFF 10M
Reserved
Reserved
Reserved
00 22A0 0000 00 22A0 FFFF 64K
VCP2_0 Data
VCP2_0 Data
VCP2_0 Data
00 22A1 0000 00 22AF FFFF 1M-64K Reserved
Reserved
Reserved
00 22B0 0000 00 22B0 FFFF 64K
VCP2_1 Data
VCP2_1 Data
VCP2_1 Data
00 22B1 0000 00 22BF FFFF 1M-64K Reserved
Reserved
Reserved
00 22C0 0000 00 22C0 FFFF 64K
VCP2_2 Data
VCP2_2 Data
VCP2_2 Data
00 22C1 0000 00 22CF FFFF 1M-64K Reserved
Reserved
Reserved
00 22D0 0000 00 22D0 FFFF 64K
VCP2_3 Data
VCP2_3 Data
VCP2_3 Data
00 22D1 0000 00 22DF FFFF 1M-64K Reserved
Reserved
Reserved
00 22E0 0000 00 22E0 FFFF 64K
Reserved
Reserved
Reserved
00 22E1 0000 00 22EF FFFF 1M-64K Reserved
Reserved
Reserved
00 22F0 0000 00 22F0 FFFF 64K
Reserved
Reserved
Reserved
00 22F1 0000 00 22FF FFFF 1M-64K Reserved
Reserved
Reserved
00 2300 0000 00 2300 FFFF 64K
Reserved
Reserved
Reserved
00 2301 0000 00 230F FFFF 1M-64K Reserved
Reserved
Reserved
00 2310 0000 00 2310 FFFF 64K
Reserved
Reserved
Reserved
00 2311 0000 00 231F FFFF 1M-64K Reserved
Reserved
Reserved
00 2320 0000 00 2324 FFFF 384K
TAC BEI
TAC BEI
TAC BEI
00 2325 0000 00 239F FFFF 8M-384K Reserved
Reserved
Reserved
00 23A0 0000 00 23BF FFFF 2M
Navigator
Navigator
Navigator
00 23C0 0000 00 23FF FFFF 4M
BCR-RAC data
BCR-RAC data
BCR-RAC data
00 2400 0000 00 27FF FFFF 64M
Reserved
Reserved
Reserved
00 2800 0000 00 2FFF FFFF 128M
HyperLink1 data
HyperLink1 data
HyperLink1 data
00 3000 0000 00 33FF FFFF 64M
EMIF16 CE0
EMIF16 CE0
EMIF16 CE0
00 3400 0000 00 37FF FFFF 64M
EMIF16 CE1
EMIF16 CE1
EMIF16 CE1
00 3800 0000 00 3BFF FFFF 64M
EMIF16 CE2
EMIF16 CE2
EMIF16 CE2
00 3C00 0000 00 3FFF FFFF 64M
EMIF16 CE3
EMIF16 CE3
EMIF16 CE3
00 4000 0000 00 4FFF FFFF 256M
HyperLink0 data
HyperLink0 data
HyperLink0 data
00 5000 0000
00 6000 0000
00 8000 0000
00 5FFF FFFF
00 7FFF FFFF
00 FFFF FFFF
256M
512M
2G
PCIe data
DDR3B data ^{(1) (2)}
DDR3A data/DDR3B data ^{(1) (4)}
PCIe data
DDR3B data ⁽³⁾
DDR3B data
PCIe data
DDR3B data
DDR3A data ⁽⁵⁾
01 0000 0000
01 2101 0000
01 2100 FFFF
01 2101 01FF
528M+64K Reserved
512
DDR3A EMIF configuration ⁽⁶⁾
Reserved
DDR3A EMIF configuration ⁽⁷⁾
Reserved
DDR3A EMIF configuration ⁽⁸⁾
01 2101 0200
08 0000 0000
07 FFFF FFFF
09 FFFF FFFF
32G-512
8G
Reserved
DDR3A data
Reserved
DDR3A data ⁽⁷⁾
Reserved
DDR3A data ⁽⁸⁾
0A 0000 0000 FF FFFF FFFF
End of Table 6-1
984G
Reserved
Reserved
Reserved
1 No IO coherency supported for this region. (See ARM CorePac User Guide referenced in 2.4 ‘‘Related Documentation from Texas Instruments’’ on page 19)
2 This region is mapped to DDR3B. It is aliased of 00 8000 0000 to 00 9FFF FFFF (the first 512MB of DDR3B) if the state of DDR3A_REMAP_EN pin at boot time is ‘0’.
3 This region is aliased of 00 8000 0000 to 00 9FFF FFFF (the first 512MB of DDR3B).
92 Memory, Interrupts, and EDMA for TCI6636K2H
Copyright 2013 Texas Instruments Incorporated
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