TCI6636K2H Datasheet, PDF (67/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 5-5
Ball Number
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A30
A31
A31
A32
A32
A33
A33
A34
A34
A35
A35
A36
Terminal Functions
— By Ball Number
(Part 1 of 38)
Signal Name
(nopin)
VSS
VSS
DDR3AD11
DDR3ADQS2P
DDR3ADQM2
DDR3ADQS3N
DDR3AD27
DDR3AA11
DDR3AA13
DDR3ACKE1
DDR3ACLKOUTP0
DDR3ACLKOUTP1
DDR3ARAS
DDR3ADQS8N
DDR3ACB00
DDR3ADQS4P
DDR3ADQM5
DDR3ADQS5N
DDR3AD48
DDR3ADQS6P
DDR3ADQM7
DDR3ADQS7P
RSV005
DDR3ACLKN
SPI0DIN
SPI0DOUT
SPI1DOUT
SPI2SCS2
GPIO08
BOOTMODE07†
GPIO13
BOOTMODE12†
GPIO17
EMU19†
GPIO20
EMU22†
GPIO26
EMU28†
GPIO03
BOOTMODE02†
GPIO16
Table 5-5
Ball Number
A36
A37
A38
A39
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B29
B30
B30
B31
B31
B32
B32
B33
B33
Terminal Functions
— By Ball Number
(Part 2 of 38)
Signal Name
DDR3A_REMAP_EN†
VSS
VSS
(nopin)
VSS
VSS
DDR3ADQS1P
DDR3AD12
DDR3ADQS2N
DDR3AD23
DDR3ADQS3P
DDR3AD28
DDR3AA08
DDR3AA14
DDR3ABA0
DDR3ACLKOUTN0
DDR3ACLKOUTN1
DDR3ARESET
DDR3ADQS8P
DDR3ACB02
DDR3ADQS4N
DDR3AD45
DDR3ADQS5P
DDR3AD49
DDR3ADQS6N
DDR3AD61
DDR3ADQS7N
RSV004
DDR3ACLKP
SPI0CLK
SPI1SCS0
SPI2SCS0
GPIO04
BOOTMODE03†
GPIO01
BOOTMODE00†
GPIO15
BOOTMODE_RSVD†
GPIO19
EMU21†
GPIO24
EMU26†
Table 5-5
Ball Number
B34
B34
B35
B35
B36
B36
B37
B38
B39
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C30
C31
C31
Terminal Functions
— By Ball Number
(Part 3 of 38)
Signal Name
GPIO31
EMU33†
GPIO23
EMU25†
GPIO30
EMU32†
ARMCLKN
VSS
VSS
VSS
DDR3ADQM0
DDR3ADQS1N
VSS
DDR3AD22
VSS
DDR3AD24
VSS
DDR3AA06
VSS
DDR3ABA1
VSS
DDR3ACAS
VSS
DDR3ACB01
VSS
DDR3ADQM4
VSS
DDR3AD40
VSS
DDR3AD52
VSS
DDR3AD56
VSS
SPI0SCS1
VSS
SPI1SCS1
SPI1CLK
VSS
GPIO07
BOOTMODE06†
GPIO18
EMU20†
Copyright 2013 Texas Instruments Incorporated
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