TCI6636K2H Datasheet, PDF (282/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 10-7 Clock Domains (Part 2 of 2)
LPSC Number
Module(s)
29
FFTC_1
30
FFTC_2
31
FFTC_3
32
Reserved
33
Reserved
34
AIF2
35
TCP3d_0
36
TCP3d_1
37
Reserved
38
Reserved
39
VCP2_0
40
VCP2_1
41
VCP2_2
42
VCP2_3
43
Reserved
44
Reserved
45
Reserved
46
Reserved
47
BCP
48
Reserved
49
HyperLink1
50
Reserved
51
ARM Smart Reflex
52
ARM CorePac
No LPSC
End of Table 10-7
Bootcfg, PSC, and PLL Controller
Notes
Software control
Software control
Software control
Reserved
Reserved
Software control
Software control
Software control
Reserved
Reserved
Software control
Software control
Software control
Software control
Reserved
Reserved
Reserved
Reserved
Software control
Reserved
Software control
Reserved
Software control
Software control
These modules do not use LPSC
10.3.3 PSC Register Memory Map
Table 10-8 shows the PSC Register memory map.
Table 10-8 PSC Register Memory Map (Part 1 of 5)
Offset
Register
Description
0x000
PID
Peripheral Identification Register
0x004 - 0x010 Reserved
Reserved
0x014
VCNTLID
Voltage Control Identification Register
0x018 - 0x11C Reserved
Reserved
0x120
PTCMD
Power Domain Transition Command Register
0x124
Reserved
Reserved
0x128
PTSTAT
Power Domain Transition Status Register
0x12C - 0x1FC Reserved
Reserved
0x200
PDSTAT0
Power Domain Status Register 0
0x204
PDSTAT1
Power Domain Status Register 1
0x208
PDSTAT2
Power Domain Status Register 2
0x20C
PDSTAT3
Power Domain Status Register 3
282 TCI6636K2H Peripheral Information and Electrical Specifications
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback