TCI6636K2H Datasheet, PDF (277/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
10.2.1.3 Prolonged Resets
Holding the device in POR, RESETFULL, or RESET for long periods of time may affect the long-term reliability of
the part (due to an elevated voltage condition that can stress the part). The device should not be held in a reset for
times exceeding one hour at a time and no more than 5% of the total lifetime for which the device is powered-up.
Exceeding these limits will cause a gradual reduction in the reliability of the part. This can be avoided by allowing
the device to boot and then configuring it to enter a hibernation state soon after power is applied. This will satisfy
the reset requirement while limiting the power consumption of the device.
10.2.1.4 Clocking During Power Sequencing
Some of the clock inputs are required to be present for the device to initialize correctly, but behavior of many of the
clocks is contingent on the state of the boot configuration pins. Table 10-4 describes the clock sequencing and the
conditions that affect clock operation. Note that all clock drivers should be in a high-impedance state until CVDD
is at a valid level and that all clock inputs be either active or in a static state with one leg pulled to ground and the
other connected to CVDD.
Table 10-4 Clock Sequencing
Clock
Condition
Sequencing
DDR3ACLK None
Must be present 16 μsec before POR transitions high.
DDR3BCLK None
Must be present 16 μsec before POR transitions high.
SYSCLK
CORECLKSEL = 0
CORECLKSEL = 1
SYSCLK is used to clock the core PLL. It must be present 16 μsec before POR transitions high.
SYSCLK is used only for AIF2. Clock must be present before the reset to the AIF2 is removed. Reserved.
CORECLKSEL = 0
ALTCORECLK
CORECLKSEL = 1
ALTCORECLK is not used and should be tied to a static state.
ALTCORECLK is used to clock the core PLL. It must be present 16 μsec before POR transitions high.
PASSCLK
PASSCLKSEL = 0
PASSCLKSEL = 1
PASSCLK is not used and should be tied to a static state.
PASSCLK is used as a source for the PASS PLL. It must be present before the PASS PLL is removed from
reset and programmed.
An SGMII port will be used. SRIOSGMIICLK must be present 16 μsec before POR transitions high.
SGMII will not be used. SRIO SRIOSGMIICLK must be present 16 μsec before POR transitions high.
will be used as a boot device.
SRIOSGMIICLK _{SGMII will not be used. SRIO SRIOSGMIICLK is used as a source to the SRIO SerDes PLL. It must be present before the SRIO is removed}
will be used after boot.
from reset and programmed.
SGMII will not be used. SRIO SRIOSGMIICLK is not used and should be tied to a static state.
will not be used.
PCIE will be used as a boot PCIECLK must be present 16 μsec before POR transitions high.
device.
PCIECLK
PCIE will be used after boot. PCIECLK is used as a source to the PCIE SerDes PLL. It must be present before the PCIe is removed from
reset and programmed.
PCIE will not be used.
PCIECLK is not used and should be tied to a static state.
HyperLink will be used as a HYPCLK must be present 16 μsec before POR transitions high.
boot device.
HYPCLK
HyperLink will be used after HYPCLK is used as a source to the HyperLink SerDes PLL. It must be present before the HyperLink is
boot.
removed from reset and programmed.
HyperLink will not be used. HYPCLK is not used and should be tied to a static state.
End of Table 10-4
10.2.2 Power-Down Sequence
The power down sequence is the exact reverse of the power-up sequence described above. The goal is to prevent an
excessive amount of static current and to prevent overstress of the device. A power-good circuit that monitors all the
supplies for the device should be used in all designs. If a catastrophic power supply failure occurs on any voltage rail,
POR should transition to low to prevent over-current conditions that could possibly impact device reliability.
Copyright 2013 Texas Instruments Incorporated
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TCI6636K2H Peripheral Information and Electrical Specifications 277