TCI6636K2H Datasheet, PDF (189/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

Figure 7-3 TeraNet 3_C
XMC ´ 8
ARM CorePac
TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
6636
HyperLink 0 _M
HyperLink 1 _M
Bridge_5
Bridge_6
Bridge_7
Bridge_8
From TeraNet_3_A
Bridge_9
Bridge_10
QM_Second _M
EDMA TC_0 M
CC0 _{TC_1 M}
EDMA TC_0 M
CC4 _{TC_1 M}
RAC_0_BE1_LP _M
RAC_1_BE1_LP M
TNet_3_J
CPU/3
S ^{HyperLink 0}
S ^{HyperLink 1}
S ^SES
S ^SMS
M
S
MSMC
M
Tracer_
MSMC0-8
DDR3A
BR_SES_0
BR_SES_1
BR_SES_2
BR_SMS_0
BR_SMS_1
BR_SMS_2
TNet_SES
CPU/1
TNet_SMS
CPU/1
TNet_msmc_sys
CPU/1
To TeraNet_3_A
To TeraNet_3P_A
CPU Port
Sys Port
TNet_3_U
CPU/3
MPU_7
Tracer_DDRB
DDR3B
To TeraNet_3_A
Bridge_1
Bridge_2
Bridge_3
Copyright 2013 Texas Instruments Incorporated
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System Interconnect 189