TCI6636K2H Datasheet, PDF (182/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-36 EDMA3CC2 Events for TCI6636K2H (Part 2 of 2)
Event No. Event Name
Description
43
CIC_2_OUT23
CIC2 Interrupt Controller output
44
CIC_2_OUT24
CIC2 Interrupt Controller output
45
CIC_2_OUT25
CIC2 Interrupt Controller output
46
CIC_2_OUT26
CIC2 Interrupt Controller output
47
CIC_2_OUT27
CIC2 Interrupt Controller output
48
CIC_2_OUT28
CIC2 Interrupt Controller output
49
SPI_0_XEVT
SPI0 transmit event
50
SPI_0_REVT
SPI0 receive event
51
VCP2_0_REVT0
VCP receive event
52
VCP2_0_XEVT0
VCP transmit event
53
VCP2_0_REVT1
VCP receive event
54
VCP2_0_XEVT1
VCP transmit event
55
VCP2_0_REVT2
VCP receive event
56
VCP2_0_XEVT2
VCP transmit event
57
VCP2_0_REVT3
VCP receive event
58
VCP2_0_XEVT3
VCP transmit event
59
RAC_0_INT
RAC interrupt
60
RAC_1_INT
RAC interrupt
61
Reserved
Reserved
62
Reserved
Reserved
63
BCP_INT0
End of Table 6-36
BCP interrupt
Table 6-37 EDMA3CC3 Events for TCI6636K2H (Part 1 of 3)
Event No. Event Name
Description
0
SPI_2_INT0
SPI2 interrupt
1
SPI_2_INT1
SPI2 interrupt
2
SPI_2_XEVT
SPI2 transmit event
3
SPI_2_REVT
SPI2 receive event
4
I2C_2_REVT
I2C2 receive
5
I2C_2_XEVT
I2C2 transmit
6
UART_1_URXEVT
UART1 receive event
7
UART_1_UTXEVT
UART1 transmit event
8
SPI_1_INT0
SPI1 interrupt
9
SPI_1_INT1
SPI1 interrupt
10
SPI_1_XEVT
SPI1 transmit event
11
SPI_1_REVT
SPI1 receive event
12
I2C_0_REVT
I2C0 receive
13
I2C_0_XEVT
I2C0 transmit
14
I2C_1_REVT
I2C1 receive
15
I2C_1_XEVT
I2C1 transmit
16
SRIO_INTDST0
SRIO interrupt
17
SRIO_INTDST1
SRIO interrupt
182 Memory, Interrupts, and EDMA for TCI6636K2H
Copyright 2013 Texas Instruments Incorporated
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