TCI6636K2H Datasheet, PDF (342/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
10.35 Emulation Features and Capability
The debug capabilities of KeyStoneII devices include the Debug subsystem module (DEBUGSS). The DEBUGSS
module contains the ICEPick module which handles the external JTAG Test Access Port (TAP) and multiple
secondary TAPs for the various processing cores of the device. It also provides Debug Access Port (DAP) for system
wide memory access from debugger, Cross triggering, System trace, Peripheral suspend generation, Debug port
(EMUx) pin management etc. The DEBUGSS module works in conjunction with the debug capability integrated in
the processing cores (ARM and DSP subsystems) to provide a comprehensive hardware platform for a rich debug
and development experience.
342 TCI6636K2H Peripheral Information and Electrical Specifications
Copyright 2013 Texas Instruments Incorporated
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