TCI6636K2H Datasheet, PDF (256/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
8.2.3.22 ARM Endian Configuration Register 2 (ARMENDIAN_CFGr_2), r=0..7
The registers defined in ARM Configuration Register 2 (ARMENDIAN_CFGr_2) enable the word swapping of a
region.
Figure 8-33 ARM Endian Configuration Register 2 (ARMENDIAN_CFGr_2), r=0..7
31
1
0
Reserved
DIS
R-0000 0000 0000 0000 0000 0000 0000 000
RW-0
Legend: RW = Read/Write; -n = value after reset
Table 8-51 ARM Endian Configuration Register 2 Field Descriptions
Bit Field
31-1 Reserved
0
DIS
End of Table 8-51
Description
Reserved
Disabling the word swap of a region
0 : Enable word swap for region
1 : Disable word swap for region
8.2.3.23 Chip Miscellaneous Control (CHIP_MISC_CTL0) Register
Figure 8-34 Chip Miscellaneous Control Register (CHIP_MISC_CTL0)
31
19
18
Reserved
USB_PME_EN
R-0
16
15
14
13
RW-0
spacer
12
AETMUXSEL0
Reserved
RAC01_DIS
MSMC_BLOCK_PARITY_RST
RW-0
RW-0
RW-0
RW-0
Legend: R = Read only; W = Write only; -n = value after reset
11
3
Reserved
RW-0
17
AETMUXSEL1
RW-0
2
0
QM_PRIORITY
RW-0
Table 8-52 Chip Miscellaneous Control Register (CHIP_MISC_CTL0) Field Descriptions (Part 1 of 2)
Bit
31-19
18
Field
Reserved
USB_PME_EN
17 AETMUXSEL1
16 AETMUXSEL0
15-14 Reserved
13 RAC01_DIS
Description
Reserved.
Enables wakeup event generation from USB
0 = Disable PME event generation
1 = Enable PME event generation
Controls the mux that selects whether an AET event from EDMA CC2 or EDMA CC3 is connected to the C66x
Interrupt Controller
0 = EDMA CC2 (default)
1 = EDMA CC3
Controls the mux that selects whether an AET event from EDMA CC2 or EDMA CC4 is connected to the C66x
Interrupt Controller
0 = EDMA CC2 (default)
1 = EDMA CC4
Controls RAC broadcaster indicates presence/absence of RAC 0/1
1 = RAC is Disabled
0 = RAC is Enabled
256 Device Boot and Configuration
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback