TCI6636K2H Datasheet, PDF (207/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
8 Device Boot and Configuration
8.1 Device Boot
8.1.1 Boot Sequence
The boot sequence is a process by which the internal memory is loaded with program and data sections. The boot
sequence is started automatically after each power-on reset or warm reset.
The TCI6636K2H supports several boot processes that begins execution at the ROM base address, which contains
the bootloader code necessary to support various device boot modes. The boot processes are software-driven and
use the BOOTMODE[15:0] device configuration inputs to determine the software configuration that must be
completed. For more details on boot sequence see the Bootloader User Guide in 2.4 ‘‘Related Documentation from
Texas Instruments’’ on page 19.
For TCI6636K2H nonsecure devices, there are two types of booting: the C66x CorePac as the boot master and the
ARM CorePac as the boot master. For secure devices, the C66x CorePac is always the secure master and the C66x
CorePac0 or ARM CorePac Core0 can be the boot master. The ARM CorePac does not support no-boot mode. Both
the C66x CorePacs and the ARM CorePac need to read the bootmode register to determine how to proceed with the
boot.
Table 8-1 shows memory space reserved for boot by the C66x CorePac.
Table 8-1
C66x DSP Boot RAM Memory Map
Start Address
Size
0x80_0000
0x1_0000
0x8e_7f80
0x80
0x8e_8000
0x7f00
0x8e_767c
4
0x8e_fff0
4
0x8f_7800
0x410
0x8f_a290
0x4000
0x8f_e290
0x90
0x8f_e320
0x20
0x8f_e410
0xf0
0x8f_e520
0x13fc
0x8f_f91c
0x404
0x8f_fd20
0x180
0x8f_fea0
0x60
0x8f_ff00
0x80
0x8f_fff8
0x4
0x8f_fffc
0x4
End of Table 8-1
Description
Reserved
C66x CorePac ROM version string
Boot Master Table overlayed with scratch
Boot Master Table Valid Length Field
Host Data Address (boot magic address for secure boot through master peripherals)
Secure host Data structure
Boot Stack
Boot Log Data
Boot Status Stack
Boot Stats
Boot Data
Boot Trace Info
DDR Config
Boot RAM call table
Boot Parameter table
Secure Signal Magic address
Boot Magic address
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback
Device Boot and Configuration 207