TCI6636K2H Datasheet, PDF (52/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 5-2
Terminal Functions — Signals and Control by Function (Part 15 of 19)
Signal Name
Ball No. Type IPD/IPU Description
HyperLink1
HYP1RXN0
AU7
I
HYP1RXP0
AU8
I
HYP1RXN1
AV6
I
HYP1RXP1
HYP1RXN2
AV7
I
AU4
I
HyperLink1 receive data
HYP1RXP2
AU5
I
HYP1RXN3
AV3
I
HYP1RXP3
AV4
I
HYP1TXN0
AT6
O
HYP1TXP0
AT7
O
HYP1TXN1
AP5
O
HYP1TXP1
HYP1TXN2
AP6
O
AR4
O
HyperLink1 transmit data
HYP1TXP2
AR5
O
HYP1TXN3
AT3
O
HYP1TXP3
AT4
O
HYP1RXFLCLK
AH4
O Down
HYP1RXFLDAT
AG2
O Down
HYP1TXFLCLK
AH3
I
Down
HYP1TXFLDAT
HYP1RXPMCLK
AH2
I
AF3
I
Down
Down
HyperLink1 sideband signals
HYP1RXPMDAT
AF4
I
Down
HYP1TXPMCLK
AH1
O Down
HYP1TXPMDAT
HYP1REFRES
SCL0
SCL1
SCL2
SDA0
SDA1
SDA2
AF2
O Down
AM6
A
N1
IOZ
N4
IOZ
P4
IOZ
P3
IOZ
N2
IOZ
N3
IOZ
HyperLink1 SerDes reference resistor input (3 kΩ +/- 1%)
I²C
I²C0 clock
I²C1 clock
I²C2 clock
I²C0 data
I²C1 data
I²C2 data
JTAG
TCK
AE1
I
Up
JTAG clock input
TDI
AG1
I
Up
JTAG data input
TDO
AF1
OZ Up
JTAG data output
TMS
AE2
I
Up
JTAG test mode input
TRST
AD1
I
Down JTAG reset
MDIO
MDCLK
AP31 O Down MDIO clock
MDIO
AR32 IOZ Up
MDIO data
52 Terminals
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