TCI6636K2H Datasheet, PDF (150/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-26 CIC2 Event Inputs (Secondary Events for EDMA3CC0 and HyperLinks) (Part 5 of 12)
Event No. Event Name
Description
169
QMSS_INTD_2_HIGH_15
Navigator second hi interrupt
170
QMSS_INTD_2_HIGH_16
Navigator second hi interrupt
171
QMSS_INTD_2_HIGH_17
Navigator second hi interrupt
172
QMSS_INTD_2_HIGH_18
Navigator second hi interrupt
173
QMSS_INTD_2_HIGH_19
Navigator second hi interrupt
174
QMSS_INTD_2_HIGH_20
Navigator second hi interrupt
175
QMSS_INTD_2_HIGH_21
Navigator second hi interrupt
176
QMSS_INTD_2_HIGH_22
Navigator second hi interrupt
177
QMSS_INTD_2_HIGH_23
Navigator second hi interrupt
178
QMSS_INTD_2_HIGH_24
Navigator second hi interrupt
179
QMSS_INTD_2_HIGH_25
Navigator second hi interrupt
180
QMSS_INTD_2_HIGH_26
Navigator second hi interrupt
181
QMSS_INTD_2_HIGH_27
Navigator second hi interrupt
182
QMSS_INTD_2_HIGH_28
Navigator second hi interrupt
183
QMSS_INTD_2_HIGH_29
Navigator second hi interrupt
184
QMSS_INTD_2_HIGH_30
Navigator second hi interrupt
185
QMSS_INTD_2_HIGH_31
Navigator second hi interrupt
186
MPU_12_INT
MPU12 addressing violation interrupt and protection violation interrupt
187
MPU_13_INT
MPU13 addressing violation interrupt and protection violation interrupt
188
MPU_14_INT
MPU14 addressing violation interrupt and protection violation interrupt
189
Reserved
Reserved
190
Reserved
Reserved
191
Reserved
Reserved
192
Reserved
Reserved
193
Reserved
Reserved
194
Reserved
Reserved
195
Reserved
Reserved
196
Reserved
Reserved
197
Reserved
Reserved
198
Reserved
Reserved
199
TRACER_QMSS_QM_CFG2_INT Tracer sliding time window interrupt for Navigator CFG2 slave port
200
TRACER_EDMACC_0
Tracer sliding time window interrupt foR EDMA3CC0
201
TRACER_EDMACC_123_INT
Tracer sliding time window interrupt for EDMA3CC1, EDMA3CC2 and EDMA3CC3
202
TRACER_CIC_INT
Tracer sliding time window interrupt for interrupt controllers (CIC)
203
MPU_4_INT
MPU4 addressing violation interrupt and protection violation interrupt
204
MPU_5_INT
MPU5 addressing violation interrupt and protection violation interrupt
205
MPU_6_INT
MPU6 addressing violation interrupt and protection violation interrupt
206
MPU_7_INT
MPU7 addressing violation interrupt and protection violation interrupt
207
MPU_8_INT
MPU8 addressing violation interrupt and protection violation interrupt
208
QMSS_INTD_2_PKTDMA_0
Navigator ECC error interrupt
209
QMSS_INTD_2_PKTDMA_1
Navigator ECC error interrupt
210
SR_0_VPSMPSACK
SmartReflex VPVOLTUPDATE asserted and SMPS has acknowledged in a defined time interval
211
DDR3_0_ERR
DDR3A error interrupt
212
HyperLink_0_INT
HyperLink 0 interrupt
150 Memory, Interrupts, and EDMA for TCI6636K2H
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