TCI6636K2H Datasheet, PDF (306/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 10-29 Main PLL Controller/ARM/SRIO/HyperLink/PCIe/USB Clock Input Timing Requirements ⁽¹⁾ (Part 2 of 3)
(see Figure 10-21 through Figure 10-24)
No.
Min
Max Unit
2 tw(SYSCLKP)
Pulse width SYSCLKP high
0.45*tc
0.55*tc
ns
3 tw(SYSCLKP)
Pulse width SYSCLKP low
0.45*tc
0.55*tc
ns
4 tr(SYSCLK_200 mV)
Transition time SYSCLK differential rise time
(200 mV)
50
350
ps
4 tf(SYSCLK_200 mV)
5 tj(SYSCLKN)
Transition time SYSCLK differential fall time
(200 mV)
Jitter, peak_to_peak _ periodic SYSCLKN
50
350
ps
0.2*tc(SYSCLKN) ⁽³⁾
ps
5 tj(SYSCLKP)
Jitter, peak_to_peak _ periodic SYSCLKP
0.2*tc(SYSCLKP)
ps
ARMCLK[P:N]
1 tc(ARMCLKN)
Cycle time ARMCLKN cycle time
3.2
25
ns
1 tc(ARMCLKP)
Cycle time ARMCLKP cycle time
3.2
25
ns
3 tw(ARMCLKN)
Pulse width ARMCLKN high
0.45*tc(ARMCLKN)
0.55*tc(ARMCLKN)
ns
2 tw(ARMCLKN)
Pulse width ARMCLKN low
0.45*tc(ARMCLKN)
0.55*tc(ARMCLKN)
ns
2 tw(ARMCLKP)
Pulse width ARMCLKP high
0.45*tc(ARMCLKP)
0.55*tc(ARMCLKP)
ns
3 tw(ARMCLKP)
Pulse width ARMCLKP low
0.45*tc(ARMCLKP)
0.55*tc(ARMCLKP)
ns
4 tr(ARMCLK_200 mV)
Transition time ARMCLK differential rise time
(200 mV)
50
350
ps
4 tf(ARMCLK_200 mV)
Transition time ARMCLK differential fall time
(200 mV)
50
350
ps
5 tj(ARMCLKN)
Jitter, peak_to_peak _ periodic ARMCLKN
100
ps
5 tj(ARMCLKP)
Jitter, peak_to_peak _ periodic ARMCLKP
100
ps
ALTCORECLK[P:N]
1 tc(ALTCORCLKN)
Cycle time ALTCORECLKN cycle time
3.2
25
ns
1 tc(ALTCORECLKP)
Cycle time ALTCORECLKP cycle time
3.2
25
ns
3 tw(ALTCORECLKN)
Pulse width ALTCORECLKN high
0.45*tc(ALTCORECLKN) 0.55*tc(ALTCORECLKN)
ns
2 tw(ALTCORECLKN)
Pulse width ALTCORECLKN low
0.45*tc(ALTCORECLKN) 0.55*tc(ALTCORECLKN)
ns
2 tw(ALTCORECLKP)
Pulse width ALTCORECLKP high
0.45*tc(ALTCORECLKP) 0.55*tc(ALTCORECLKP)
ns
3 tw(ALTCORECLKP)
Pulse width ALTCORECLKP low
0.45*tc(ALTCORECLKP) 0.55*tc(ALTCORECLKP)
ns
4 tr(ALTCORECLK_200 mV)
Transition time ALTCORECLK differential rise time
(200 mV)
50
350
ps
4 tf(ALTCORECLK_200 mV)
Transition time ALTCORECLK differential fall time
(200 mV)
50
350
ps
5 tj(ALTCORECLKN)
Jitter, peak_to_peak _ periodic ALTCORECLKN
100
ps
5 tj(ALTCORECLKP)
Jitter, peak_to_peak _ periodic ALTCORECLKP
100
ps
SRIOSGMIICLK[P:N]
1 tc(SRIOSGMIICLKN)
Cycle time SRIOSGMIICLKN cycle time
3.2 or 6.4 or 8
ns
1 tc(SRIOSGMIICLKP)
Cycle time SRIOSGMIICLKP cycle time
3.2 or 6.4 or 8
ns
3 tw(SRIOSGMIICLKN)
Pulse width SRIOSGMIICLKN high
0.45*tc(SRIOSGMIICLKN) 0.55*tc(SRIOSGMIICLKN)
ns
2 tw(SRIOSGMIICLKN)
Pulse width SRIOSGMIICLKN low
0.45*tc(SRIOSGMIICLKN) 0.55*tc(SRIOSGMIICLKN)
ns
2 tw(SRIOSGMIICLKP)
Pulse width SRIOSGMIICLKP high
0.45*tc(SRIOSGMIICLKP) 0.55*tc(SRIOSGMIICLKP)
ns
3 tw(SRIOSGMIICLKP)
Pulse width SRIOSGMIICLKP low
0.45*tc(SRIOSGMIICLKP) 0.55*tc(SRIOSGMIICLKP)
ns
4 tr(SRIOSGMIICLK_200mV)
Transition time SRIOSGMIICLK differential rise
time (200 mV)
50
350
ps
4 tf(SRIOSGMIICLK_200mV)
Transition time SRIOSGMIICLK differential fall
time (200 mV)
50
350
ps
5 tj(SRIOSGMIICLKN)
Jitter, RMS SRIOSGMIICLKN
2 ps, RMS
306 TCI6636K2H Peripheral Information and Electrical Specifications
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback