TCI6636K2H Datasheet, PDF (266/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
9 Device Operating Conditions
9.1 Absolute Maximum Ratings
Table 9-1
Absolute Maximum Ratings ⁽¹⁾
Over Operating Case Temperature Range (Unless Otherwise Noted)
Supply voltage range ⁽²⁾:
Input voltage (V_I) range: ⁽³⁾
Output voltage (V_O) range: ⁽³⁾
Operating case temperature range, T_C:
ESD stress voltage, V_ESD ⁽⁴⁾
Overshoot/undershoot ⁽⁷⁾
Storage temperature range, T_stg:
End of Table 9-1
CVDD
CVDD1
CVDDT1
DVDD15
DVDD18
DVDD33
DDR3VREFSSTL
VDDAHV
VDDALV
VDDUSB
AVDDA1, AVDDA2, AVDDA3,AVDDA4,
AVDDA5
AVDDA6, AVDDA7
AVDDA8, AVDDA9, AVDDA10
AVDDA11, AVDDA12, AVDDA13
AVDDA14, AVDDA15
VSS Ground
LVCMOS (1.8 V)
DDR3A, DDR3B
I²C
LVDS
LJCB
SerDes
LVCMOS (1.8 V)
DDR3A, DDR3B
I²C
SerDes
Commercial
Extended
HBM (human body model) ⁽⁵⁾
CDM (charged device model) ⁽⁶⁾
LVCMOS (1.8 V)
DDR3A, DDR3B
I²C
-0.3 V to 1.3 V
-0.3 V to 1.3 V
-0.3 V to 1.3 V
-0.3 V to 1.98 V
-0.3 V to 2.45 V
-0.3V to 3.63 V
0.49 × DVDD15 to 0.51 × DVDD15
-0.3 V to 1.98 V
-0.3 V to 0.935 V
-0.3V to 0.935 V
-0.3 V to 1.98 V
-0.3 V to 1.98 V
0V
-0.3 V to DVDD18+0.3 V
-0.3 V to 1.98 V
-0.3 V to 2.45 V
-0.3 V to DVDD18+0.3 V
-0.3 V to 1.3 V
-0.3 V to VDDAHV1+0.3 V
-0.3 V to DVDD18+0.3 V
-0.3 V to 1.98 V
-0.3 V to 2.45 V
-0.3 V to VDDAHV+0.3 V
0°C to 85°C
-40°C to 100°C
±1000 V
±250 V
20% overshoot/undershoot for 20% of
signal duty cycle
-65°C to 150°C
1 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions
for extended periods may affect device reliability.
2 All voltage values are with respect to V_SS.
3 For USB High-Speed, Full-Speed, and Low -Speed modes, USB I/Os adhere to Universal Serial Bus, revision 2.0 standard. For USB Super-Speed mode, USB I/Os adhere to
Universal Serial Bus, revision 3.1 specification, revision 1.0 standard.
4 Electrostatic discharge (ESD) to measure device sensitivity/immunity to damage caused by electrostatic discharges into the device.
5 Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001-2010. JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD
control process, and manufacturing with less than 500 V HBM is possible if necessary precautions are taken. Pins listed as 1000 V may actually have higher performance.
266 Device Operating Conditions
Copyright 2013 Texas Instruments Incorporated
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