TCI6636K2H Datasheet, PDF (102/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-12 MPU6-MPU11 Programmable Range n Start Address Register (PROGn_MPSAR) Reset Values (Part 2 of 2)
Register
MPU6
MPU7
MPU8
MPU9
MPU10
MPU11
PROG9_MPSAR
Reserved
0x4000_0000
N/A
0x0000_0000 N/A
0x0253_0000
PROG10_MPSAR
Reserved
0x4800_0000
N/A
0x0000_0000 N/A
0x0253_0C00
PROG11_MPSAR
Reserved
0x5000_0000
N/A
0x0000_0000 N/A
0x0260_B000
PROG12_MPSAR
Reserved
0x5800_0000
N/A
0x0000_0000 N/A
0x0262_0000
PROG13_MPSAR
Reserved
0x6000_0000
N/A
0x0000_0000 N/A
0x0300_0000
PROG14_MPSAR
Reserved
0x6800_0000
N/A
0x0000_0000 N/A
0x021E_0000
PROG15_MPSAR
End of Table 6-12
Reserved
0x7000_0000
N/A
0x0000_0000 N/A
0x0268_0000
Table 6-13 MPU12-MPU14 Programmable Range n Start Address Register (PROGn_MPSAR) Reset Values
Register
MPU12
MPU13
MPU14
PROG0_MPSAR
0x2100_0400
0x2100_0400
0x2100_0800
PROG1_MPSAR
0x0000_0000
0x0000_0000
0x0000_0000
PROG2_MPSAR
N/A
N/A
N/A
PROG3_MPSAR
N/A
N/A
N/A
PROG4_MPSAR
N/A
N/A
N/A
PROG5_MPSAR
N/A
N/A
N/A
PROG6_MPSAR
N/A
N/A
N/A
PROG7_MPSAR
N/A
N/A
N/A
PROG8_MPSAR
N/A
N/A
N/A
PROG9_MPSAR
N/A
N/A
N/A
PROG10_MPSAR
N/A
N/A
N/A
PROG11_MPSAR
N/A
N/A
N/A
PROG12_MPSAR
N/A
N/A
N/A
PROG13_MPSAR
N/A
N/A
N/A
PROG14_MPSAR
N/A
N/A
N/A
PROG15_MPSAR
N/A
End of Table 6-13
N/A
N/A
6.2.2.2 Programmable Range n - End Address Register (PROGn_MPEAR)
The programmable address end register holds the end address for the range. This register is writeable by a supervisor
entity only. If NS = 0 (non-secure mode) in the associated MPPAR register then the register is also writeable only by
a secure entity.
The end address must be aligned on a page boundary. The size of the page depends on the MPU number. The page
size for MPU1 is 1K byte and for MPU2 it is 64K bytes. The size of the page determines the width of the address field
in MPSAR and MPEAR
Figure 6-3 Programmable Range n End Address Register (PROGn_MPEAR)
31
10
9
0
END_ADDR
Reserved
R/W
R
Legend: R = Read only; R/W = Read/Write
102 Memory, Interrupts, and EDMA for TCI6636K2H
Copyright 2013 Texas Instruments Incorporated
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