TCI6636K2H Datasheet, PDF (125/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-24 CIC0 Event Inputs — C66x CorePac Secondary Interrupts (Part 2 of 12)
Event No. Event Name
Description
32
EDMACC_0_ERRINT
EDMA3CC0 error interrupt
33
EDMACC_0_MPINT
EDMA3CC0 memory protection interrupt
34
EDMACC_0_TC_0_ERRINT
EDMA3CC0 TPTC0 error interrupt
35
EDMACC_0_TC_1_ERRINT
EDMA3CC0 TPTC1 error interrupt
36
EDMACC_0_GINT
EDMA3CC0 global completion interrupt
37
Reserved
Reserved
38
EDMACC_0_TC_0_INT
EDMA3CC0 individual completion interrupt
39
EDMACC_0_TC_1_INT
EDMA3CC0 individual completion interrupt
40
EDMACC_0_TC_2_INT
EDMA3CC0 individual completion interrupt
41
EDMACC_0_TC_3_INT
EDMA3CC0 individual completion interrupt
42
EDMACC_0_TC_4_INT
EDMA3CC0 individual completion interrupt
43
EDMACC_0_TC_5_INT
EDMA3CC0 individual completion interrupt
44
EDMACC_0_TC_6_INT
EDMA3CC0 individual completion interrupt
45
EDMACC_0_TC_7_INT
EDMA3CC0 individual completion interrupt
46
Reserved
Reserved
47
QMSS_QUE_PEND_652
Navigator transmit queue pending event for indicated queue
48
PCIE_INT12
PCIE protocol error interrupt
49
PCIE_INT13
PCIE power management interrupt
50
PCIE_INT0
PCIE legacy INTA interrupt
51
PCIE_INT1
PCIE legacy INTB interrupt
52
PCIE_INT2
PCIE legacy INTC interrupt
53
PCIE_INT3
PCIE legacy INTD interrupt
54
SPI_0_INT0
SPI0 interrupt0
55
SPI_0_INT1
SPI0 interrupt1
56
SPI_0_XEVT
SPI0 transmit event
57
SPI_0_REVT
SPI0 receive event
58
I2C_0_INT
I2C0 interrupt
59
I2C_0_REVT
I2C0 receive event
60
I2C_0_XEVT
I2C0 transmit event
61
Reserved
Reserved
62
Reserved
Reserved
63
DBGTBR_DMAINT
Debug trace buffer (TBR) DMA event
64
MPU_12_INT
MPU12 addressing violation interrupt and protection violation interrupt
65
DBGTBR_ACQCOMP
Debug trace buffer (TBR) acquisition has been completed
66
MPU_13_INT
MPU13 addressing violation interrupt and protection violation interrupt
67
MPU_14_INT
MPU14 addressing violation interrupt and protection violation interrupt
68
NETCP_MDIO_LINK_INT0
Packet Accelerator 0 subsystem MDIO interrupt
69
NETCP_MDIO_LINK_INT1
Packet Accelerator 0 subsystem MDIO interrupt
70
NETCP_MDIO_USER_INT0
Packet Accelerator 0 subsystem MDIO interrupt
71
NETCP_MDIO_USER_INT1
Packet Accelerator 0 subsystem MDIO interrupt
72
NETCP_MISC_INT
Packet Accelerator 0 subsystem misc interrupt
73
TRACER_CORE_0_INT
Tracer sliding time window interrupt for DSP0 L2
74
TRACER_CORE_1_INT
Tracer sliding time window interrupt for DSP1 L2
75
TRACER_CORE_2_INT
Tracer sliding time window interrupt for DSP2 L2
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Memory, Interrupts, and EDMA for TCI6636K2H 125