TCI6636K2H Datasheet, PDF (211/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
8.1.2.1 Boot Device Field
The Boot Device field BOOTMODE[16-14-4-3-2-1] and the Boot Device field BOOTMODE[8] define the boot
device and the boot master that is chosen. The following table shows the supported boot modes.
Table 8-3
Boot Mode Pins: Boot Device Values
Bit
Field
Description
16, 14, 4, 3, 2, 1 Boot Device
End of Table 8-3
Device boot mode
– ARM is a boot master when BOOTMODE[8]=0
» Sleep = X0[Min]000b
» I²C Slave = [Slave Addr1]1[Min]000b
» I²C Master = X1[Min]001b
» SPI = [Width][Csel0][Min]010b
» EMIF = 0[BaseAddr0][Min]011b
» NAND = 1[BaseAddr0][Min]011b
» Serial Rapid I/O = [Lane][Ref Clock0][Min]100b
» Ethernet (SGMII) = [Pa clk][Ref Clk0][Min]101b
» PCI = [Ref clk][Bar Config2]0110b
» HyperLink = [Port][Ref Clk0]1110b
» UART = XX[Min]111b
– C66x is a boot master when BOOTMODE[8]=1
» Sleep = X0[Min]000b
» I²C Slave = [Slave Addr1]1[Min]000b
» I²C Master = X1[Min]001b
» SPI = [Width][Csel0][Min]010b
» EMIF = 0[BaseAddr0][Min]011b
» NAND = 1[BaseAddr0][Min]011b
» Serial Rapid I/O = [Lane][Ref Clock0][Min]100b
» Ethernet (SGMII) = [Pa clk][Ref Clk0][Min]101b
» PCI = [Ref clk][Bar Config2]0110b
» HyperLink = [Port][Ref Clk0]1110b
» UART = XX[Min]111b
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Device Boot and Configuration 211