TCI6636K2H Datasheet, PDF (334/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
10.26.2 GPIO Peripheral Register Description
Table 10-54 GPIO Registers
Hex Address Offsets
Acronym
0x0008
BINTEN
0x000C
-
0x0010
DIR
0x0014
OUT_DATA
0x0018
SET_DATA
0x001C
CLR_DATA
0x0020
IN_DATA
0x0024
SET_RIS_TRIG
0x0028
CLR_RIS_TRIG
0x002C
SET_FAL_TRIG
0x0030
CLR_FAL_TRIG
0x008C
-
0x0090 - 0x03FF
-
End of Table 10-54
Register Name
GPIO interrupt per bank enable register
Reserved
GPIO Direction Register
GPIO Output Data Register
GPIO Set Data Register
GPIO Clear Data Register
GPIO Input Data Register
GPIO Set Rising Edge Interrupt Register
GPIO Clear Rising Edge Interrupt Register
GPIO Set Falling Edge Interrupt Register
GPIO Clear Falling Edge Interrupt Register
Reserved
Reserved
10.26.3 GPIO Electrical Data/Timing
Table 10-55 GPIO Input Timing Requirements ⁽¹⁾
(see Figure 10-52)
No.
1
t_w(GPOH)
2
t_w(GPOL)
End of Table 10-55
Pulse duration, GPOx high
Pulse duration, GPOx low
1 C = 1/SYSCLK1 clock frequency in ns
Table 10-56 GPIO Output Switching Characteristics ⁽¹⁾
(see Figure 10-52)
No.
Parameter
3
t_w(GPOH)
4
t_w(GPOL)
End of Table 10-56
Pulse duration, GPOx high
Pulse duration, GPOx low
1 C = 1/SYSCLK1clock frequency in ns
Figure 10-52 GPIO Timing
1
2
GPIx
3
4
GPOx
Min
12C
12C
Min
36C - 8
36C - 8
Max Unit
ns
ns
Max Unit
ns
ns
334 TCI6636K2H Peripheral Information and Electrical Specifications
Copyright 2013 Texas Instruments Incorporated
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