TCI6636K2H Datasheet, PDF (169/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

Table 6-28 CIC1 Registers (Part 7 of 7)
Address Offset
Register Mnemonic
0x694
CH_MAP_REG169
0x698
CH_MAP_REG170
0x69C
CH_MAP_REG171
0x800
HINT_MAP_REG0
0x804
HINT_MAP_REG1
0x808
HINT_MAP_REG2
0x80c
HINT_MAP_REG3
0x810
HINT_MAP_REG4
0x814
HINT_MAP_REG5
0x818
HINT_MAP_REG6
0x81c
HINT_MAP_REG7
0x820
HINT_MAP_REG8
0x824
HINT_MAP_REG9
0x828
HINT_MAP_REG10
0x82c
HINT_MAP_REG11
0x830
HINT_MAP_REG12
0x834
HINT_MAP_REG13
0x1500
ENABLE_HINT_REG0
0x1504
ENABLE_HINT_REG1
End of Table 6-28
6.3.2.3 CIC2 Register Map
Table 6-29 CIC2 Registers (Part 1 of 5)
Address Offset
Register Mnemonic
0x0
REVISION_REG
0x10
GLOBAL_ENABLE_HINT_REG
0x20
STATUS_SET_INDEX_REG
0x24
STATUS_CLR_INDEX_REG
0x28
ENABLE_SET_INDEX_REG
0x2c
ENABLE_CLR_INDEX_REG
0x34
HINT_ENABLE_SET_INDEX_REG
0x38
HINT_ENABLE_CLR_INDEX_REG
0x200
RAW_STATUS_REG0
0x204
RAW_STATUS_REG1
0x208
RAW_STATUS_REG2
0x20C
RAW_STATUS_REG3
0x210
RAW_STATUS_REG4
0x214
RAW_STATUS_REG5
0x218
RAW_STATUS_REG6
0x21C
RAW_STATUS_REG7
0x220
RAW_STATUS_REG8
0x224
RAW_STATUS_REG9
0x228
RAW_STATUS_REG10
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback
TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Register Name
Interrupt Channel Map Register for 676 to 676+3
Interrupt Channel Map Register for 680 to 680+3
Interrupt Channel Map Register for 684 to 684+3
Host Interrupt Map Register for 0 to 0+3
Host Interrupt Map Register for 4 to 4+3
Host Interrupt Map Register for 8 to 8+3
Host Interrupt Map Register for 12 to 12+3
Host Interrupt Map Register for 16 to 16+3
Host Interrupt Map Register for 20 to 20+3
Host Interrupt Map Register for 24 to 24+3
Host Interrupt Map Register for 28 to 28+3
Host Interrupt Map Register for 32 to 32+3
Host Interrupt Map Register for 36 to 36+3
Host Interrupt Map Register for 40 to 40+3
Host Interrupt Map Register for 44 to 44+3
Host Interrupt Map Register for 48 to 48+3
Host Interrupt Map Register for 52 to 52+3
Host Interrupt Enable Register 0
Host Interrupt Enable Register 1
Register Name
Revision Register
Global Host Interrupt Enable Register
Status Set Index Register
Status Clear Index Register
Enable Set Index Register
Enable Clear Index Register
Host Interrupt Enable Set Index Register
Host Interrupt Enable Clear Index Register
Raw Status Register 0
Raw Status Register 1
Raw Status Register 2
Raw Status Register 3
Raw Status Register 4
Raw Status Register 5
Raw Status Register 6
Raw Status Register 7
Raw Status Register 8
Raw Status Register 9
Raw Status Register 10
Memory, Interrupts, and EDMA for TCI6636K2H 169