TCI6636K2H Datasheet, PDF (332/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
10.20 Rake Search Accelerator (RSA)
There are sixteen Rake Search Accelerators (RSAs) on the device. Each C66x CorePac has one set of
directly-connected RSA pairs. The RSA is an extension of the C66x CorePac. The C66x CorePac performs
send/receive to the RSAs via the .L and .S functional units.
10.21 Enhanced Viterbi-Decoder Coprocessor (VCP2)
The device has four high-performance embedded Viterbi Decoder Coprocessors (VCP2) that improve
channel-decoding operations on-chip. Operating at SYSCLK1 clock divided by 3, each VCP2 can decode more than
762 12.2-Kbps 3G adaptive multi-rate (AMR) [K = 9, R = 1/3] voice channels when running at 333 MHz. The VCP2
supports constraint lengths K = 5, 6, 7, 8, and 9, rates R = 3/4, 1/2, 1/3, 1/4, and 1/5, and flexible polynomials, while
generating hard decisions or soft decisions. Communications between the VCP2 and the C66x CorePac are carried
out through the EDMA3 controller. The VCP2 supports:
• Unlimited frame sizes
• Code rates 3/4, 1/2, 1/3, 1/4, and 1/5
• Constraint lengths 5, 6, 7, 8, and 9
• Programmable encoder polynomials
• Programmable reliability and convergence lengths
• Hard and soft decoded decisions
• Tail and convergent modes
• Yamamoto logic
• Tail biting logic
• Various input and output FIFO lengths
For more information, see the Viterbi Coprocessor (VCP2) for KeyStone Devices User Guide in 2.4 ‘‘Related
Documentation from Texas Instruments’’ on page 19.
10.22 Turbo Decoder Coprocessor (TCP3d)
The TCI6636K2H has two high-performance embedded Turbo-Decoder Coprocessors (TCP3d) that speed up
channel-decoding operations on-chip for WCDMA, HSPA, HSPA+, TD-SCDMA, LTE, and WiMAX. Operating at
SYSCLK1 divided by 2 or 3, the TCP3d processes data channels at a throughput of > 100 Mbps. For more
information, see the Turbo Decoder Coprocessor 3 (TCP3d) for KeyStone Devices User Guide in 2.4 ‘‘Related
Documentation from Texas Instruments’’ on page 19.
10.23 Turbo Encoder Coprocessor (TCP3e)
The TCI6636K2H has a high-performance Turbo-Encoder Coprocessor (TCP3e) (embedded in the BCP) that
speeds up channel-encoding operations on-chip for WCDMA, HSPA, HSPA+, TD-SCDMA, LTE, and WiMAX.
Operating at SYSCLK1 divided by 3, the TCP3e is capable of processing data channels at a throughput
of > 200 Mbps. For more information, see the Turbo Encoder Coprocessor 3 (TCP3e) for KeyStone Devices User Guide
in 2.4 ‘‘Related Documentation from Texas Instruments’’ on page 19.
332 TCI6636K2H Peripheral Information and Electrical Specifications
Copyright 2013 Texas Instruments Incorporated
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