TCI6636K2H Datasheet, PDF (355/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Added CHIP_MISC_CTL1 register (Page 231)
Added Initial Voltage for SR core supply (Page 258)
Added the Boot Parameter Table section (Page 217)
Updated the PWRSTATECTL register (Page 239)
Updated the register bit fields (Page 239)
Updated the L1 and L2 specs. Changed 4-way to 2-way, and changed 8-way to 16-way. (Page 32)
Added ARM PLL Configuration info for 1400 MHz device (Page 226)
Added bit 13 as PAPLL in the PASSPLLCTL1 register (Page 301)
Added Note "Each supply must ramp monotonically and must reach a stable valid level in 20ms or less" (Page 267)
Added Note "Each supply must ramp monotonically and must reach a stable valid level in 20ms or less" (Page 265)
Changed PLLD at 156.25 from 24 to 2 for 1200 MHz device (Page 225)
Updated PLLD at 156.25 from 0 to 3 for 800 MHz devices (Page 225)
Updated the CVDD and its associated peripheral (Page 259)
Added tying CVDD and CVDDT together (Page 60)
Updated with CVDDS (Page 267)
Updated with CVDDS (Page 265)
Corrected rise and fall time of all differential clock pairs (Page 296)
Corrected rise and fall time of differential clock pairs (Page 297)
Added additional information to Emulation Features and Capability section (Page 329)
Changed 5000 to 6000 (Page 88)
Corrected the ARM_LENDIAN configuration pin description (Page 227)
Added ARMCLK specification (Page 296)
Added ARMCLK specification (Page 296)
Changed EMIF16 CS(x) to EMIF16 CE(x-2) (Page 84)
Changed 1200.80 to 1228.80 (Page 225)
Updated with miscellaneous information (Page 272)
Updated with miscellaneous information (Page 271)
Updated the ALNCTL Register in the Peripheral Information and Electrical Specifications chapter. (Page 289)
Updated the DCHANGE Register in the Peripheral Information and Electrical Specifications chapter. (Page 289)
Changed to not support external charge pump for 5V (Page 325)
Changed ’bit’ to ’pin’ (Page 227)
Updated BOOTMODE pins and MIN information (Page 202)
Updated the Clocking info. (Page 35)
Revision B
Added Terminal functions and pin list tables. (Page 42)
Reorganized memory content. (Page 85)
Added device pin map. (Page 37)
Revision A
Added Device Boot and Configuration chapter. (Page 195)
Added Device Operating Conditions chapter. (Page 239)
Added Peripheral Information and Electrical Specifications chapter. (Page 243)
Added System Interconnect chapter. (Page 182)
In the SPI Switching Characteristics table: Changed the incorrect SPIx_Clk signal name to SPICLK. (Page 288)
In the SPI Switching Characteristics table: Changed the incorrect SPIx_SCS signal name to SPISCSx. (Page 289)
In the SPI Switching Characteristics table: Corrected signal name from SPIx_SIMO to SPIDOUT. (Page 288)
In the SPI Timing Requirements table: Changed the incorrect SPIx_Clk signal name to SPICLK. (Page 288)
In the SPI Timing Requirements table: Corrected signal name SPIx_SOMI to SPIDIN. (Page 288)
Added Security section (Page 208)
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Revision History 355