English
Language : 

TCI6636K2H Datasheet, PDF (129/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-24 CIC0 Event Inputs — C66x CorePac Secondary Interrupts (Part 6 of 12)
Event No. Event Name
Description
206
AIF_INT
AIF interrupt
207
EDMACC_4_ERRINT
EDMA3CC4 error interrupt
208
EDMACC_4_MPINT
EDMA3CC4 memory protection interrupt
209
EDMACC_4_TC_0_ERRINT
EDMA3CC4 TPTC0 error interrupt
210
EDMACC_4_TC_1_ERRINT
EDMA3CC4 TPTC1 error interrupt
211
EDMACC_4_GINT
EDMA3CC4 GINT
212
EDMACC_4_TC_0_INT
EDMA3CC4 individual completion interrupt
213
EDMACC_4_TC_1_INT
EDMA3CC4 individual completion interrupt
214
EDMACC_4_TC_2_INT
EDMA3CC4 individual completion interrupt
215
EDMACC_4_TC_3_INT
EDMA3CC4 individual completion interrupt
216
EDMACC_4_TC_4_INT
EDMA3CC4 individual completion interrupt
217
EDMACC_4_TC_5_INT
EDMA3CC4 individual completion interrupt
218
EDMACC_4_TC_6_INT
EDMA3CC4 individual completion interrupt
219
EDMACC_4_TC_7_INT
EDMA3CC4 individual completion interrupt
220
EDMACC_3_ERRINT
EDMA3CC3 error interrupt
221
EDMACC_3_MPINT
EDMA3CC3 memory protection interrupt
222
EDMACC_3_TC_0_ERRINT
EDMA3CC3 TPTC0 error interrupt
223
EDMACC_3_TC_1_ERRINT
EDMA3CC3 TPTC1 error interrupt
224
EDMACC_3_GINT
EDMA3CC3 GINT
225
EDMACC_3_TC_0_INT
EDMA3CC3 individual completion interrupt
226
EDMACC_3_TC_1_INT
EDMA3CC3 individual completion interrupt
227
EDMACC_3_TC_2_INT
EDMA3CC3 individual completion interrupt
228
EDMACC_3_TC_3_INT
EDMA3CC3 individual completion interrupt
229
EDMACC_3_TC_4_INT
EDMA3CC3 individual completion interrupt
230
EDMACC_3_TC_5_INT
EDMA3CC3 individual completion interrupt
231
EDMACC_3_TC_6_INT
EDMA3CC3 individual completion interrupt
232
EDMACC_3_TC_7_INT
EDMA3CC3 individual completion interrupt
233
UART_1_UARTINT
UART1 interrupt
234
UART_1_URXEVT
UART1 receive event
235
UART_1_UTXEVT
UART1 transmit event
236
I2C_1_INT
I2C1 interrupt
237
I2C_1_REVT
I2C1 receive event
238
I2C_1_XEVT
I2C1 transmit event
239
SPI_1_INT0
SPI1 interrupt0
240
SPI_1_INT1
SPI1 interrupt1
241
SPI_1_XEVT
SPI1 transmit event
242
SPI_1_REVT
SPI1 receive event
243
MPU_5_INT
MPU5 addressing violation interrupt and protection violation interrupt
244
MPU_8_INT
MPU8 addressing violation interrupt and protection violation interrupt
245
MPU_9_INT
MPU9 addressing violation interrupt and protection violation interrupt
246
MPU_11_INT
MPU11 addressing violation interrupt and protection violation interrupt
247
MPU_4_INT
MPU4 addressing violation interrupt and protection violation interrupt
248
MPU_6_INT
MPU6 addressing violation interrupt and protection violation interrupt
249
MPU_7_INT
MPU7 addressing violation interrupt and protection violation interrupt
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback
Memory, Interrupts, and EDMA for TCI6636K2H 129