TCI6636K2H Datasheet, PDF (128/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 6-24 CIC0 Event Inputs — C66x CorePac Secondary Interrupts (Part 5 of 12)
Event No. Event Name
Description
162
ARM_TBR_ACQ
ARM trace buffer (TBR) acquisition has been completed
163
ARM_NINTERRIRQ
ARM internal memory ECC error interrupt request
164
ARM_NAXIERRIRQ
ARM bus error interrupt request
165
SR_0_SR_TEMPSENSOR
SmartReflex temperature threshold crossing interrupt
166
SR_0_SR_TIMERINT
SmartReflex internal timer expiration interrupt
167
AIF_ATEVT8
AIF timer event
168
AIF_ATEVT9
AIF timer event
169
AIF_ATEVT10
AIF timer event
170
AIF_ATEVT11
AIF timer event
171
AIF_ATEVT12
AIF timer event
172
AIF_ATEVT13
AIF timer event
173
AIF_ATEVT14
AIF timer event
174
AIF_ATEVT15
AIF timer event
175
TIMER_7_INTL
Timer interrupt low
176
TIMER_7_INTH
Timer interrupt high
177
TIMER_6_INTL
Timer interrupt low
178
TIMER_6_INTH
Timer interrupt high
179
TIMER_5_INTL
Timer interrupt low
180
TIMER_5_INTH
Timer interrupt high
181
TIMER_4_INTL
Timer interrupt low
182
TIMER_4_INTH
Timer interrupt high
183
TIMER_3_INTL
Timer interrupt low
184
TIMER_3_INTH
Timer interrupt high
185
TIMER_2_INTL
Timer interrupt low
186
TIMER_2_INTH
Timer interrupt high
187
TIMER_1_INTL
Timer interrupt low
188
TIMER_1_INTH
Timer interrupt high
189
TIMER_0_INTL
Timer interrupt low
190
TIMER_0_INTH
Timer interrupt high
191
TCP3D_0_INT
TCP3d interrupt
192
TCP3D_1_INT
TCP3d interrupt
193
Reserved
Reserved
194
Reserved
Reserved
195
TCP3D_0_REVT0
TCP3d event
196
TCP3D_0_REVT1
TCP3d event
197
TCP3D_1_REVT0
TCP3d event
198
TCP3D_1_REVT1
TCP3d event
199
Reserved
Reserved
200
Reserved
Reserved
201
Reserved
Reserved
202
Reserved
Reserved
203
TAC_INT
TAC interrupt
204
TAC_DEVT0
TAC debug event
205
TAC_DEVT1
TAC debug event
128 Memory, Interrupts, and EDMA for TCI6636K2H
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