TCI6636K2H Datasheet, PDF (249/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
8.2.3.16 Timer Input Selection Register (TINPSEL)
The Timer Input Selection Register selects timer inputs and is shown in Figure 8-27 and described in Table 8-45.
Figure 8-27 Timer Input Selection Register (TINPSEL)
31
30
29
28
27
26
25
24
TINPHSEL15
TINPLSEL15
TINPHSEL14
TINPLSEL14
TINPHSEL13
TINPLSEL13
TINPHSEL12
TINPLSEL12
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
23
22
21
20
19
18
17
16
TINPHSEL11
TINPLSEL11
TINPHSEL10
TINPLSEL10
TINPHSEL9
TINPLSEL9
TINPHSEL8
TINPLSEL8
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
15
14
13
12
11
10
9
8
TINPHSEL7
TINPLSEL7
TINPHSEL6
TINPLSEL6
TINPHSEL5
TINPLSEL5
TINPHSEL4
TINPLSEL4
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
7
6
5
4
3
2
1
0
TINPHSEL3
TINPLSEL3
TINPHSEL2
TINPLSEL2
TINPHSEL1
TINPLSEL1
TINPHSEL0
TINPLSEL0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 8-45 Timer Input Selection Field Description (Part 1 of 3)
Bit Field
31 TINPHSEL15
30 TINPLSEL15
29 TINPHSEL14
28 TINPLSE14
27 TINPHSEL13
26 TINPLSEL13
25 TINPHSEL12
24 TINPLSEL12
23 TINPHSEL11
Description
Input select for TIMER15 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER15 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER14 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER14 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER13 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER13 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER12 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER12low.
0 = TIMI0
1 = TIMI1
Input select for TIMER11 high.
0 = TIMI0
1 = TIMI1
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