TCI6636K2H Datasheet, PDF (208/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
Table 8-2 shows addresses reserved for boot by the ARM CorePac.
Table 8-2
ARM Boot RAM Memory Map (Part 1 of 2)
Start Address
0xc57_e000
0xc58_6f80
0xc58_7000
0xc58_c000
0xc58_d000
0xc58_e000
0xc58_f000
0xc59_0000
0xc59_7f00
0xc5a_6e00
0xc5a_7000
0xc5a_a000
0xc5a_d000
0xc5a_d004
0xc5a_d008
0xc5a_d00c
0xc5a_e000
0xc5a_e400
0xc5a_e800
0xc5a_ec00
0xc5a_f000
0xc5a_f400
0xc5a_f800
0xc5a_fc00
0xc5b_0000
0xc5b_0180
0xc5b_0200
0xc5b_0300
0x5b_0400
0xc5b_0500
0xc5b_0600
0xc5b_1fe0
0xc5b_4000
0xc5b_4180
0xc5b_4200
0xc5b_4300
0x5b_4400
0xc5b_4500
0xc5b_4600
0xc5b_5fe0
0xc5b_8000
0xc5b_8180
Size
0xc00
0x80
0x5000
0x1000
0x1000
0x1000
0x1000
0x7f00
4
0x200
0x3000
0x3000
4
4
4
4
0x400
0x400
0x400
0x400
0x400
0x400
0x400
0x400
0x180
0x80
0x100
0x100
0x100
0x100
0x19e0
0x1010
0x180
0x80
0x100
0x100
0x100
0x100
0x19e0
0x1010
0x180
0x80
Description
Context RAM not scrubbed on secure boot
Global level 0 non-secure translation table
Global non-secure page table for memory covering ROM
Core 0 non-secure level 1 translation table
Core 1 non-secure level 1 translation table
Core 2 non-secure level 1 translation table
Core 3 non-secure level 1 translation table
Packet memory buffer
Host Data Address (boot magic address for secure boot through master peripherals)
DDR3a configuration structure
Boot Data
Supervisor stack, each core gets 0xc00 bytes
Arm boot magic address, core 0
Arm boot magic address, core 1
Arm boot magic address, core 2
Arm boot magic address, core 3
Abort stack, core 0
Abort stack, core 1
Abort stack, core 2
Abort stack, core 3
Unknown mode stack, core 0
Unknown mode stack, core 1
Unknown mode stack, core 2
Unknown mode stack, core 3
Boot Version string, core 0
Boot status stack, core 0
Boot stats, core 0
Boot log, core 0
Boot RAM call table, core 0
Boot parameter tables, core 0
Boot Data, core 0
Boot Trace, core 0
Boot Version string, core 1
Boot status stack, core 1
Boot stats, core 1
Boot log, core 1
Boot RAM call table, core 1
Boot parameter tables, core 1
Boot Data, core 1
Boot Trace, core 1
Boot Version string, core 2
Boot status stack, core 2
208 Device Boot and Configuration
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback