TCI6636K2H Datasheet, PDF (350/362 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

TCI6636K2H
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS835F—October 2013
The DEBUGSS supports upto 32 debug suspend sources (processor cores) and 64 debug suspend sinks (peripherals).
The assignment of processor cores is shown in and the assignment of peripherals is shown in Table 10-66. By default
the logical AND of all the processor cores is routed to the peripherals. It is possible to select an individual core to be
routed to the peripheral (For example: used in tightly coupled peripherals like timers), a logical AND of all cores
(Global peripherals) or a logical OR of all cores by programming the DEBUGSS.DRM module.
The SOFT bit should be programmed based on whether or not an immediate pause of the peripheral function is
required or if the peripheral suspend should occur only after a particular completion point is reached in the normal
peripheral operation. The FREE bit should be programmed to enable or disable the emulation suspend functionality.
Table 10-66 Peripherals Emulation Support (Part 1 of 2)
Peripheral
EDMA_x, where
X=0/1/2/3/4
QM_SS
CP_Tracers_X, where X =
0..32
MPU_X, where X = 0..11
CP_INTC
BOOT_CFG
SEC_MGR
PSC
PLL
TIMERx, x=0, 1..7, 8..19
Semaphore
GPIO
DDR3A/B
MSMC
EMIF16
I²C_X, where X = 0/1/2
SPI_X, where X = 0/1/2
UART_X, where X = 0/1
USIM
Hyperlink_0/1
PCIeSS 0
SRIO / NetCP_1
NetCP (ethernet switch)
USBSS
RAC_0
RAC_1
Emulation Suspend Support
Stop-Mode Real-Time Mode FREE Bit
Infrastructure Peripherals
N
N
N
STOP Bit
N
Emulation Request
Support
(cemudbg/emudbg)
Y
Y (CPDMA Y (CPDMA only) Y (CPDMA only) Y (CPDMA only)
Y
only)
N
N
N
N
N
N
N
N
N
Y
N
N
N
N
Y
N
N
N
N
Y
N
N
N
N
Y
N
N
N
N
N
N
N
N
N
N
Y
N
Y
Y
N
N
N
N
N
Y
N
N
N
N
N
Memory Controller Peripherals
N
N
N
N
Y
N
N
N
N
Y
N
N
N
N
Y
Serial Interfaces
Y
N
Y
Y
Y
N
N
N
N
Y
Y
N
Y
Y
Y
Y
N
Y
N
N
High Speed Serial Interfaces
N
N
N
N
Y
N
N
N
N
N
Y
Y
Y
Y (Soft Only)
Y
Y
Y
Y
Y
N
N
N
N
N
N
Accelarators
Y
N
N
N
Y
Y
N
N
N
Y
Debug Peripheral
Assignment
NA
20
NA
NA
NA
NA
NA
NA
NA
0, 1..7, 8..19
NA
NA
NA
NA
NA
21/22/23
NA
24/25
28
26
27
NA
30
31
350 TCI6636K2H Peripheral Information and Electrical Specifications
Copyright 2013 Texas Instruments Incorporated
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